Lines Matching refs:b43_phy_write
129 b43_phy_write(dev, 0x4ea, 0x4688); in b43_radio_2064_init()
150 b43_phy_write(dev, 0x933, 0x2d6b); in b43_radio_2064_init()
151 b43_phy_write(dev, 0x934, 0x2d6b); in b43_radio_2064_init()
152 b43_phy_write(dev, 0x935, 0x2d6b); in b43_radio_2064_init()
153 b43_phy_write(dev, 0x936, 0x2d6b); in b43_radio_2064_init()
154 b43_phy_write(dev, 0x937, 0x016b); in b43_radio_2064_init()
170 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2 | 0x1); in b43_phy_lcn_afe_set_unset()
171 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1 | 0x1); in b43_phy_lcn_afe_set_unset()
173 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2 & ~0x1); in b43_phy_lcn_afe_set_unset()
174 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1 & ~0x1); in b43_phy_lcn_afe_set_unset()
176 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2); in b43_phy_lcn_afe_set_unset()
177 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1); in b43_phy_lcn_afe_set_unset()
209 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x340); in b43_phy_lcn_clear_tx_power_offsets()
211 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0); in b43_phy_lcn_clear_tx_power_offsets()
212 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0); in b43_phy_lcn_clear_tx_power_offsets()
216 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) | 0x80); in b43_phy_lcn_clear_tx_power_offsets()
218 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0); in b43_phy_lcn_clear_tx_power_offsets()
219 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0); in b43_phy_lcn_clear_tx_power_offsets()
228 b43_phy_write(dev, 0x43b, 0); in b43_phy_lcn_rev0_baseband_init()
229 b43_phy_write(dev, 0x43c, 0); in b43_phy_lcn_rev0_baseband_init()
230 b43_phy_write(dev, 0x44c, 0); in b43_phy_lcn_rev0_baseband_init()
231 b43_phy_write(dev, 0x4e6, 0); in b43_phy_lcn_rev0_baseband_init()
232 b43_phy_write(dev, 0x4f9, 0); in b43_phy_lcn_rev0_baseband_init()
233 b43_phy_write(dev, 0x4b0, 0); in b43_phy_lcn_rev0_baseband_init()
234 b43_phy_write(dev, 0x938, 0); in b43_phy_lcn_rev0_baseband_init()
235 b43_phy_write(dev, 0x4b0, 0); in b43_phy_lcn_rev0_baseband_init()
236 b43_phy_write(dev, 0x44e, 0); in b43_phy_lcn_rev0_baseband_init()
241 b43_phy_write(dev, 0x44a, 0x80); in b43_phy_lcn_rev0_baseband_init()
248 b43_phy_write(dev, 0x910, 0x1); in b43_phy_lcn_rev0_baseband_init()
251 b43_phy_write(dev, 0x910, 0x1); in b43_phy_lcn_rev0_baseband_init()
266 b43_phy_write(dev, 0x414, 0x1e10); in b43_phy_lcn_bu_tweaks()
267 b43_phy_write(dev, 0x415, 0x0640); in b43_phy_lcn_bu_tweaks()
272 b43_phy_write(dev, 0x44a, 0x80); in b43_phy_lcn_bu_tweaks()
280 b43_phy_write(dev, 0x7d6, 0x0902); in b43_phy_lcn_bu_tweaks()
413 b43_phy_write(dev, save_phy_regs[i][0], save_phy_regs[i][1]); in b43_phy_lcn_sense_setup()
465 b43_phy_write(dev, phy_regs[j], in b43_phy_lcn_load_tx_iir_cck_filter()
493 b43_phy_write(dev, phy_regs[j], in b43_phy_lcn_load_tx_iir_ofdm_filter()
516 b43_phy_write(dev, 0x4b5, in b43_phy_lcn_set_tx_gain()
520 b43_phy_write(dev, 0x4fc, in b43_phy_lcn_set_tx_gain()
566 b43_phy_write(dev, 0x942, 0x7); in b43_phy_lcn_txrx_spur_avoidance_mode()
567 b43_phy_write(dev, 0x93b, ((1 << 13) + 23)); in b43_phy_lcn_txrx_spur_avoidance_mode()
568 b43_phy_write(dev, 0x93c, ((1 << 13) + 1989)); in b43_phy_lcn_txrx_spur_avoidance_mode()
570 b43_phy_write(dev, 0x44a, 0x084); in b43_phy_lcn_txrx_spur_avoidance_mode()
571 b43_phy_write(dev, 0x44a, 0x080); in b43_phy_lcn_txrx_spur_avoidance_mode()
572 b43_phy_write(dev, 0x6d3, 0x2222); in b43_phy_lcn_txrx_spur_avoidance_mode()
573 b43_phy_write(dev, 0x6d3, 0x2220); in b43_phy_lcn_txrx_spur_avoidance_mode()
575 b43_phy_write(dev, 0x942, 0x0); in b43_phy_lcn_txrx_spur_avoidance_mode()
576 b43_phy_write(dev, 0x93b, ((0 << 13) + 23)); in b43_phy_lcn_txrx_spur_avoidance_mode()
577 b43_phy_write(dev, 0x93c, ((0 << 13) + 1989)); in b43_phy_lcn_txrx_spur_avoidance_mode()
601 b43_phy_write(dev, 0x942, 0); in b43_phy_lcn_set_channel_tweaks()
605 b43_phy_write(dev, 0x425, 0x5907); in b43_phy_lcn_set_channel_tweaks()
613 b43_phy_write(dev, 0x942, 0); in b43_phy_lcn_set_channel_tweaks()
617 b43_phy_write(dev, 0x425, 0x590a); in b43_phy_lcn_set_channel_tweaks()
621 b43_phy_write(dev, 0x44a, 0x80); in b43_phy_lcn_set_channel_tweaks()
638 b43_phy_write(dev, 0x44a, 0x80); in b43_phy_lcn_set_channel()
645 b43_phy_write(dev, 0x657, sfo_cfg[channel->hw_value - 1][0]); in b43_phy_lcn_set_channel()
646 b43_phy_write(dev, 0x658, sfo_cfg[channel->hw_value - 1][1]); in b43_phy_lcn_set_channel()
705 b43_phy_write(dev, 0x6d0, 0x7); in b43_phy_lcn_op_init()
709 b43_phy_write(dev, 0x60a, 0xa0); in b43_phy_lcn_op_init()
710 b43_phy_write(dev, 0x46a, 0x19); in b43_phy_lcn_op_init()