193 	b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode);  in b43_phy_ht_force_rf_sequence()
206 			b43_phy_write(dev, regs[i], htphy->rf_ctl_int_save[i]);  in b43_phy_ht_pa_override()
212 			b43_phy_write(dev, regs[i], 0x0400);  in b43_phy_ht_pa_override()
242 	b43_phy_write(dev, B43_PHY_HT_BBCFG, bbcfg | B43_PHY_HT_BBCFG_RSTCCA);  in b43_phy_ht_reset_cca()
244 	b43_phy_write(dev, B43_PHY_HT_BBCFG, bbcfg & ~B43_PHY_HT_BBCFG_RSTCCA);  in b43_phy_ht_reset_cca()
257 			b43_phy_write(dev, B43_PHY_EXTG(base[i] + j), 0);  in b43_phy_ht_zero_extg()
261 		b43_phy_write(dev, B43_PHY_EXTG(base[i] + 0xc), 0);  in b43_phy_ht_zero_extg()
300 		b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val);  in b43_phy_ht_bphy_init()
305 		b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val);  in b43_phy_ht_bphy_init()
308 	b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668);  in b43_phy_ht_bphy_init()
364 	b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, 0x4400);  in b43_phy_ht_load_samples()
367 		b43_phy_write(dev, B43_PHY_HT_TABLE_DATAHI, 0);  in b43_phy_ht_load_samples()
368 		b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, 0);  in b43_phy_ht_load_samples()
386 	b43_phy_write(dev, B43_PHY_HT_SAMP_DEP_CNT, samps - 1);  in b43_phy_ht_run_samples()
389 	b43_phy_write(dev, B43_PHY_HT_SAMP_LOOP_CNT, loops);  in b43_phy_ht_run_samples()
390 	b43_phy_write(dev, B43_PHY_HT_SAMP_WAIT_CNT, wait);  in b43_phy_ht_run_samples()
412 	b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode);  in b43_phy_ht_run_samples()
504 		b43_phy_write(dev, phy_regs_to_save[i], phy_regs_values[i]);  in b43_phy_ht_poll_rssi()
560 				b43_phy_write(dev, cmd_regs[i], 0x32);  in b43_phy_ht_tx_power_ctl()
566 				b43_phy_write(dev, cmd_regs[i],  in b43_phy_ht_tx_power_ctl()
586 		b43_phy_write(dev, base[core] + 6, 0);  in b43_phy_ht_tx_power_ctl_idle_tssi()
603 		b43_phy_write(dev, base[core] + 0, save_regs[core][0]);  in b43_phy_ht_tx_power_ctl_idle_tssi()
604 		b43_phy_write(dev, base[core] + 6, save_regs[core][1]);  in b43_phy_ht_tx_power_ctl_idle_tssi()
605 		b43_phy_write(dev, base[core] + 7, save_regs[core][2]);  in b43_phy_ht_tx_power_ctl_idle_tssi()
782 	b43_phy_write(dev, B43_PHY_HT_BW1, e->bw1);  in b43_phy_ht_channel_setup()
783 	b43_phy_write(dev, B43_PHY_HT_BW2, e->bw2);  in b43_phy_ht_channel_setup()
784 	b43_phy_write(dev, B43_PHY_HT_BW3, e->bw3);  in b43_phy_ht_channel_setup()
785 	b43_phy_write(dev, B43_PHY_HT_BW4, e->bw4);  in b43_phy_ht_channel_setup()
786 	b43_phy_write(dev, B43_PHY_HT_BW5, e->bw5);  in b43_phy_ht_channel_setup()
787 	b43_phy_write(dev, B43_PHY_HT_BW6, e->bw6);  in b43_phy_ht_channel_setup()
804 	b43_phy_write(dev, 0x017e, 0x3830);  in b43_phy_ht_channel_setup()
892 	b43_phy_write(dev, B43_PHY_HT_AFE_C1_OVER, 0);  in b43_phy_ht_op_init()
893 	b43_phy_write(dev, B43_PHY_HT_AFE_C2_OVER, 0);  in b43_phy_ht_op_init()
894 	b43_phy_write(dev, B43_PHY_HT_AFE_C3_OVER, 0);  in b43_phy_ht_op_init()
896 	b43_phy_write(dev, B43_PHY_EXTG(0x103), 0x20);  in b43_phy_ht_op_init()
897 	b43_phy_write(dev, B43_PHY_EXTG(0x101), 0x20);  in b43_phy_ht_op_init()
898 	b43_phy_write(dev, 0x20d, 0xb8);  in b43_phy_ht_op_init()
899 	b43_phy_write(dev, B43_PHY_EXTG(0x14f), 0xc8);  in b43_phy_ht_op_init()
900 	b43_phy_write(dev, 0x70, 0x50);  in b43_phy_ht_op_init()
901 	b43_phy_write(dev, 0x1ff, 0x30);  in b43_phy_ht_op_init()
910 	b43_phy_write(dev, 0x32f, 0x0003);  in b43_phy_ht_op_init()
911 	b43_phy_write(dev, 0x077, 0x0010);  in b43_phy_ht_op_init()
912 	b43_phy_write(dev, 0x0b4, 0x0258);  in b43_phy_ht_op_init()
915 	b43_phy_write(dev, 0x0b9, 0x0072);  in b43_phy_ht_op_init()
977 	b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp | B43_PHY_HT_BBCFG_RSTCCA);  in b43_phy_ht_op_init()
978 	b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp & ~B43_PHY_HT_BBCFG_RSTCCA);  in b43_phy_ht_op_init()
1041 		b43_phy_write(dev, B43_PHY_HT_AFE_C1, 0x00cd);  in b43_phy_ht_op_switch_analog()
1042 		b43_phy_write(dev, B43_PHY_HT_AFE_C1_OVER, 0x0000);  in b43_phy_ht_op_switch_analog()
1043 		b43_phy_write(dev, B43_PHY_HT_AFE_C2, 0x00cd);  in b43_phy_ht_op_switch_analog()
1044 		b43_phy_write(dev, B43_PHY_HT_AFE_C2_OVER, 0x0000);  in b43_phy_ht_op_switch_analog()
1045 		b43_phy_write(dev, B43_PHY_HT_AFE_C3, 0x00cd);  in b43_phy_ht_op_switch_analog()
1046 		b43_phy_write(dev, B43_PHY_HT_AFE_C3_OVER, 0x0000);  in b43_phy_ht_op_switch_analog()
1048 		b43_phy_write(dev, B43_PHY_HT_AFE_C1_OVER, 0x07ff);  in b43_phy_ht_op_switch_analog()
1049 		b43_phy_write(dev, B43_PHY_HT_AFE_C1, 0x00fd);  in b43_phy_ht_op_switch_analog()
1050 		b43_phy_write(dev, B43_PHY_HT_AFE_C2_OVER, 0x07ff);  in b43_phy_ht_op_switch_analog()
1051 		b43_phy_write(dev, B43_PHY_HT_AFE_C2, 0x00fd);  in b43_phy_ht_op_switch_analog()
1052 		b43_phy_write(dev, B43_PHY_HT_AFE_C3_OVER, 0x07ff);  in b43_phy_ht_op_switch_analog()
1053 		b43_phy_write(dev, B43_PHY_HT_AFE_C3, 0x00fd);  in b43_phy_ht_op_switch_analog()