Lines Matching refs:wcn

30 static void wcn36xx_ccu_write_register(struct wcn36xx *wcn, int addr, int data)  in wcn36xx_ccu_write_register()  argument
36 writel(data, wcn->ccu_base + addr); in wcn36xx_ccu_write_register()
39 static void wcn36xx_dxe_write_register(struct wcn36xx *wcn, int addr, int data) in wcn36xx_dxe_write_register() argument
45 writel(data, wcn->dxe_base + addr); in wcn36xx_dxe_write_register()
48 static void wcn36xx_dxe_read_register(struct wcn36xx *wcn, int addr, int *data) in wcn36xx_dxe_read_register() argument
50 *data = readl(wcn->dxe_base + addr); in wcn36xx_dxe_read_register()
101 int wcn36xx_dxe_alloc_ctl_blks(struct wcn36xx *wcn) in wcn36xx_dxe_alloc_ctl_blks() argument
105 wcn->dxe_tx_l_ch.ch_type = WCN36XX_DXE_CH_TX_L; in wcn36xx_dxe_alloc_ctl_blks()
106 wcn->dxe_tx_h_ch.ch_type = WCN36XX_DXE_CH_TX_H; in wcn36xx_dxe_alloc_ctl_blks()
107 wcn->dxe_rx_l_ch.ch_type = WCN36XX_DXE_CH_RX_L; in wcn36xx_dxe_alloc_ctl_blks()
108 wcn->dxe_rx_h_ch.ch_type = WCN36XX_DXE_CH_RX_H; in wcn36xx_dxe_alloc_ctl_blks()
110 wcn->dxe_tx_l_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_TX_L; in wcn36xx_dxe_alloc_ctl_blks()
111 wcn->dxe_tx_h_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_TX_H; in wcn36xx_dxe_alloc_ctl_blks()
112 wcn->dxe_rx_l_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_RX_L; in wcn36xx_dxe_alloc_ctl_blks()
113 wcn->dxe_rx_h_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_RX_H; in wcn36xx_dxe_alloc_ctl_blks()
115 wcn->dxe_tx_l_ch.dxe_wq = WCN36XX_DXE_WQ_TX_L; in wcn36xx_dxe_alloc_ctl_blks()
116 wcn->dxe_tx_h_ch.dxe_wq = WCN36XX_DXE_WQ_TX_H; in wcn36xx_dxe_alloc_ctl_blks()
118 wcn->dxe_tx_l_ch.ctrl_bd = WCN36XX_DXE_CTRL_TX_L_BD; in wcn36xx_dxe_alloc_ctl_blks()
119 wcn->dxe_tx_h_ch.ctrl_bd = WCN36XX_DXE_CTRL_TX_H_BD; in wcn36xx_dxe_alloc_ctl_blks()
121 wcn->dxe_tx_l_ch.ctrl_skb = WCN36XX_DXE_CTRL_TX_L_SKB; in wcn36xx_dxe_alloc_ctl_blks()
122 wcn->dxe_tx_h_ch.ctrl_skb = WCN36XX_DXE_CTRL_TX_H_SKB; in wcn36xx_dxe_alloc_ctl_blks()
124 wcn->dxe_tx_l_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_L; in wcn36xx_dxe_alloc_ctl_blks()
125 wcn->dxe_tx_h_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_H; in wcn36xx_dxe_alloc_ctl_blks()
127 wcn->dxe_tx_l_ch.def_ctrl = WCN36XX_DXE_CH_DEFAULT_CTL_TX_L; in wcn36xx_dxe_alloc_ctl_blks()
128 wcn->dxe_tx_h_ch.def_ctrl = WCN36XX_DXE_CH_DEFAULT_CTL_TX_H; in wcn36xx_dxe_alloc_ctl_blks()
131 ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_tx_l_ch); in wcn36xx_dxe_alloc_ctl_blks()
134 ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_tx_h_ch); in wcn36xx_dxe_alloc_ctl_blks()
137 ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_rx_l_ch); in wcn36xx_dxe_alloc_ctl_blks()
140 ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_rx_h_ch); in wcn36xx_dxe_alloc_ctl_blks()
145 ret = qcom_smem_state_update_bits(wcn->tx_enable_state, in wcn36xx_dxe_alloc_ctl_blks()
156 wcn36xx_dxe_free_ctl_blks(wcn); in wcn36xx_dxe_alloc_ctl_blks()
160 void wcn36xx_dxe_free_ctl_blks(struct wcn36xx *wcn) in wcn36xx_dxe_free_ctl_blks() argument
162 wcn36xx_dxe_free_ctl_block(&wcn->dxe_tx_l_ch); in wcn36xx_dxe_free_ctl_blks()
163 wcn36xx_dxe_free_ctl_block(&wcn->dxe_tx_h_ch); in wcn36xx_dxe_free_ctl_blks()
164 wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_l_ch); in wcn36xx_dxe_free_ctl_blks()
165 wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_h_ch); in wcn36xx_dxe_free_ctl_blks()
259 static int wcn36xx_dxe_enable_ch_int(struct wcn36xx *wcn, u16 wcn_ch) in wcn36xx_dxe_enable_ch_int() argument
263 wcn36xx_dxe_read_register(wcn, in wcn36xx_dxe_enable_ch_int()
269 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_enable_ch_int()
275 static void wcn36xx_dxe_disable_ch_int(struct wcn36xx *wcn, u16 wcn_ch) in wcn36xx_dxe_disable_ch_int() argument
279 wcn36xx_dxe_read_register(wcn, in wcn36xx_dxe_disable_ch_int()
285 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_disable_ch_int()
315 static int wcn36xx_dxe_ch_alloc_skb(struct wcn36xx *wcn, in wcn36xx_dxe_ch_alloc_skb() argument
324 wcn36xx_dxe_fill_skb(wcn->dev, cur_ctl, GFP_KERNEL); in wcn36xx_dxe_ch_alloc_skb()
331 static void wcn36xx_dxe_ch_free_skbs(struct wcn36xx *wcn, in wcn36xx_dxe_ch_free_skbs() argument
343 void wcn36xx_dxe_tx_ack_ind(struct wcn36xx *wcn, u32 status) in wcn36xx_dxe_tx_ack_ind() argument
349 spin_lock_irqsave(&wcn->dxe_lock, flags); in wcn36xx_dxe_tx_ack_ind()
350 skb = wcn->tx_ack_skb; in wcn36xx_dxe_tx_ack_ind()
351 wcn->tx_ack_skb = NULL; in wcn36xx_dxe_tx_ack_ind()
352 del_timer(&wcn->tx_ack_timer); in wcn36xx_dxe_tx_ack_ind()
353 spin_unlock_irqrestore(&wcn->dxe_lock, flags); in wcn36xx_dxe_tx_ack_ind()
369 ieee80211_tx_status_irqsafe(wcn->hw, skb); in wcn36xx_dxe_tx_ack_ind()
370 ieee80211_wake_queues(wcn->hw); in wcn36xx_dxe_tx_ack_ind()
375 struct wcn36xx *wcn = from_timer(wcn, t, tx_ack_timer); in wcn36xx_dxe_tx_timer() local
383 spin_lock_irqsave(&wcn->dxe_lock, flags); in wcn36xx_dxe_tx_timer()
384 skb = wcn->tx_ack_skb; in wcn36xx_dxe_tx_timer()
385 wcn->tx_ack_skb = NULL; in wcn36xx_dxe_tx_timer()
386 spin_unlock_irqrestore(&wcn->dxe_lock, flags); in wcn36xx_dxe_tx_timer()
395 ieee80211_tx_status_irqsafe(wcn->hw, skb); in wcn36xx_dxe_tx_timer()
396 ieee80211_wake_queues(wcn->hw); in wcn36xx_dxe_tx_timer()
399 static void reap_tx_dxes(struct wcn36xx *wcn, struct wcn36xx_dxe_ch *ch) in reap_tx_dxes() argument
418 dma_unmap_single(wcn->dev, ctl->desc->src_addr_l, in reap_tx_dxes()
424 ieee80211_tx_status_irqsafe(wcn->hw, ctl->skb); in reap_tx_dxes()
427 spin_lock(&wcn->dxe_lock); in reap_tx_dxes()
428 if (WARN_ON(wcn->tx_ack_skb)) in reap_tx_dxes()
429 ieee80211_free_txskb(wcn->hw, wcn->tx_ack_skb); in reap_tx_dxes()
430 wcn->tx_ack_skb = ctl->skb; /* Tracking ref */ in reap_tx_dxes()
431 mod_timer(&wcn->tx_ack_timer, jiffies + HZ / 10); in reap_tx_dxes()
432 spin_unlock(&wcn->dxe_lock); in reap_tx_dxes()
436 ieee80211_free_txskb(wcn->hw, ctl->skb); in reap_tx_dxes()
439 if (wcn->queues_stopped) { in reap_tx_dxes()
440 wcn->queues_stopped = false; in reap_tx_dxes()
441 ieee80211_wake_queues(wcn->hw); in reap_tx_dxes()
455 struct wcn36xx *wcn = (struct wcn36xx *)dev; in wcn36xx_irq_tx_complete() local
458 wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src); in wcn36xx_irq_tx_complete()
461 wcn36xx_dxe_read_register(wcn, in wcn36xx_irq_tx_complete()
465 wcn36xx_dxe_write_register(wcn, in wcn36xx_irq_tx_complete()
470 wcn36xx_dxe_write_register(wcn, in wcn36xx_irq_tx_complete()
479 wcn36xx_dxe_write_register(wcn, in wcn36xx_irq_tx_complete()
485 wcn36xx_dxe_write_register(wcn, in wcn36xx_irq_tx_complete()
495 reap_tx_dxes(wcn, &wcn->dxe_tx_h_ch); in wcn36xx_irq_tx_complete()
500 wcn36xx_dxe_read_register(wcn, in wcn36xx_irq_tx_complete()
504 wcn36xx_dxe_write_register(wcn, in wcn36xx_irq_tx_complete()
509 wcn36xx_dxe_write_register(wcn, in wcn36xx_irq_tx_complete()
518 wcn36xx_dxe_write_register(wcn, in wcn36xx_irq_tx_complete()
524 wcn36xx_dxe_write_register(wcn, in wcn36xx_irq_tx_complete()
534 reap_tx_dxes(wcn, &wcn->dxe_tx_l_ch); in wcn36xx_irq_tx_complete()
543 struct wcn36xx *wcn = (struct wcn36xx *)dev; in wcn36xx_irq_rx_ready() local
545 wcn36xx_dxe_rx_frame(wcn); in wcn36xx_irq_rx_ready()
550 static int wcn36xx_dxe_request_irqs(struct wcn36xx *wcn) in wcn36xx_dxe_request_irqs() argument
554 ret = request_irq(wcn->tx_irq, wcn36xx_irq_tx_complete, in wcn36xx_dxe_request_irqs()
555 IRQF_TRIGGER_HIGH, "wcn36xx_tx", wcn); in wcn36xx_dxe_request_irqs()
561 ret = request_irq(wcn->rx_irq, wcn36xx_irq_rx_ready, IRQF_TRIGGER_HIGH, in wcn36xx_dxe_request_irqs()
562 "wcn36xx_rx", wcn); in wcn36xx_dxe_request_irqs()
568 enable_irq_wake(wcn->rx_irq); in wcn36xx_dxe_request_irqs()
573 free_irq(wcn->tx_irq, wcn); in wcn36xx_dxe_request_irqs()
579 static int wcn36xx_rx_handle_packets(struct wcn36xx *wcn, in wcn36xx_rx_handle_packets() argument
593 wcn36xx_dxe_read_register(wcn, status_reg, &int_reason); in wcn36xx_rx_handle_packets()
594 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR, int_mask); in wcn36xx_rx_handle_packets()
597 wcn36xx_dxe_write_register(wcn, in wcn36xx_rx_handle_packets()
605 wcn36xx_dxe_write_register(wcn, in wcn36xx_rx_handle_packets()
610 wcn36xx_dxe_write_register(wcn, in wcn36xx_rx_handle_packets()
630 ret = wcn36xx_dxe_fill_skb(wcn->dev, ctl, GFP_ATOMIC); in wcn36xx_rx_handle_packets()
635 dma_unmap_single(wcn->dev, dma_addr, WCN36XX_PKT_SIZE, in wcn36xx_rx_handle_packets()
637 wcn36xx_rx_skb(wcn, skb); in wcn36xx_rx_handle_packets()
650 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_ENCH_ADDR, en_mask); in wcn36xx_rx_handle_packets()
659 void wcn36xx_dxe_rx_frame(struct wcn36xx *wcn) in wcn36xx_dxe_rx_frame() argument
663 wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src); in wcn36xx_dxe_rx_frame()
667 wcn36xx_rx_handle_packets(wcn, &wcn->dxe_rx_l_ch, in wcn36xx_dxe_rx_frame()
675 wcn36xx_rx_handle_packets(wcn, &wcn->dxe_rx_h_ch, in wcn36xx_dxe_rx_frame()
685 int wcn36xx_dxe_allocate_mem_pools(struct wcn36xx *wcn) in wcn36xx_dxe_allocate_mem_pools() argument
693 wcn->mgmt_mem_pool.chunk_size = WCN36XX_BD_CHUNK_SIZE + in wcn36xx_dxe_allocate_mem_pools()
696 s = wcn->mgmt_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_H; in wcn36xx_dxe_allocate_mem_pools()
697 cpu_addr = dma_alloc_coherent(wcn->dev, s, in wcn36xx_dxe_allocate_mem_pools()
698 &wcn->mgmt_mem_pool.phy_addr, in wcn36xx_dxe_allocate_mem_pools()
703 wcn->mgmt_mem_pool.virt_addr = cpu_addr; in wcn36xx_dxe_allocate_mem_pools()
708 wcn->data_mem_pool.chunk_size = WCN36XX_BD_CHUNK_SIZE + in wcn36xx_dxe_allocate_mem_pools()
711 s = wcn->data_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_L; in wcn36xx_dxe_allocate_mem_pools()
712 cpu_addr = dma_alloc_coherent(wcn->dev, s, in wcn36xx_dxe_allocate_mem_pools()
713 &wcn->data_mem_pool.phy_addr, in wcn36xx_dxe_allocate_mem_pools()
718 wcn->data_mem_pool.virt_addr = cpu_addr; in wcn36xx_dxe_allocate_mem_pools()
723 wcn36xx_dxe_free_mem_pools(wcn); in wcn36xx_dxe_allocate_mem_pools()
728 void wcn36xx_dxe_free_mem_pools(struct wcn36xx *wcn) in wcn36xx_dxe_free_mem_pools() argument
730 if (wcn->mgmt_mem_pool.virt_addr) in wcn36xx_dxe_free_mem_pools()
731 dma_free_coherent(wcn->dev, wcn->mgmt_mem_pool.chunk_size * in wcn36xx_dxe_free_mem_pools()
733 wcn->mgmt_mem_pool.virt_addr, in wcn36xx_dxe_free_mem_pools()
734 wcn->mgmt_mem_pool.phy_addr); in wcn36xx_dxe_free_mem_pools()
736 if (wcn->data_mem_pool.virt_addr) { in wcn36xx_dxe_free_mem_pools()
737 dma_free_coherent(wcn->dev, wcn->data_mem_pool.chunk_size * in wcn36xx_dxe_free_mem_pools()
739 wcn->data_mem_pool.virt_addr, in wcn36xx_dxe_free_mem_pools()
740 wcn->data_mem_pool.phy_addr); in wcn36xx_dxe_free_mem_pools()
744 int wcn36xx_dxe_tx_frame(struct wcn36xx *wcn, in wcn36xx_dxe_tx_frame() argument
756 ch = is_low ? &wcn->dxe_tx_l_ch : &wcn->dxe_tx_h_ch; in wcn36xx_dxe_tx_frame()
768 ieee80211_stop_queues(wcn->hw); in wcn36xx_dxe_tx_frame()
769 wcn->queues_stopped = true; in wcn36xx_dxe_tx_frame()
801 desc_skb->src_addr_l = dma_map_single(wcn->dev, in wcn36xx_dxe_tx_frame()
805 if (dma_mapping_error(wcn->dev, desc_skb->src_addr_l)) { in wcn36xx_dxe_tx_frame()
806 dev_err(wcn->dev, "unable to DMA map src_addr_l\n"); in wcn36xx_dxe_tx_frame()
835 qcom_smem_state_update_bits(wcn->tx_rings_empty_state, in wcn36xx_dxe_tx_frame()
842 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_tx_frame()
880 int wcn36xx_dxe_tx_flush(struct wcn36xx *wcn) in wcn36xx_dxe_tx_flush() argument
886 if (_wcn36xx_dxe_tx_channel_is_empty(&wcn->dxe_tx_l_ch) && in wcn36xx_dxe_tx_flush()
887 _wcn36xx_dxe_tx_channel_is_empty(&wcn->dxe_tx_h_ch)) { in wcn36xx_dxe_tx_flush()
899 int wcn36xx_dxe_init(struct wcn36xx *wcn) in wcn36xx_dxe_init() argument
904 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data); in wcn36xx_dxe_init()
909 if (wcn->is_pronto) in wcn36xx_dxe_init()
910 wcn36xx_ccu_write_register(wcn, WCN36XX_CCU_DXE_INT_SELECT_PRONTO, reg_data); in wcn36xx_dxe_init()
912 wcn36xx_ccu_write_register(wcn, WCN36XX_CCU_DXE_INT_SELECT_RIVA, reg_data); in wcn36xx_dxe_init()
917 ret = wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_tx_l_ch); in wcn36xx_dxe_init()
919 dev_err(wcn->dev, "Error allocating descriptor\n"); in wcn36xx_dxe_init()
922 wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_l_ch, &wcn->data_mem_pool); in wcn36xx_dxe_init()
925 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_L, in wcn36xx_dxe_init()
926 wcn->dxe_tx_l_ch.head_blk_ctl->desc_phy_addr); in wcn36xx_dxe_init()
929 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_init()
933 wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, &reg_data); in wcn36xx_dxe_init()
938 ret = wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_tx_h_ch); in wcn36xx_dxe_init()
940 dev_err(wcn->dev, "Error allocating descriptor\n"); in wcn36xx_dxe_init()
944 wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_h_ch, &wcn->mgmt_mem_pool); in wcn36xx_dxe_init()
947 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_H, in wcn36xx_dxe_init()
948 wcn->dxe_tx_h_ch.head_blk_ctl->desc_phy_addr); in wcn36xx_dxe_init()
951 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_init()
955 wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, &reg_data); in wcn36xx_dxe_init()
960 ret = wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_rx_l_ch); in wcn36xx_dxe_init()
962 dev_err(wcn->dev, "Error allocating descriptor\n"); in wcn36xx_dxe_init()
967 wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_l_ch); in wcn36xx_dxe_init()
970 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_L, in wcn36xx_dxe_init()
971 wcn->dxe_rx_l_ch.head_blk_ctl->desc_phy_addr); in wcn36xx_dxe_init()
974 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_init()
979 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_init()
981 wcn->dxe_rx_l_ch.head_blk_ctl->desc->phy_next_l); in wcn36xx_dxe_init()
984 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_init()
991 ret = wcn36xx_dxe_init_descs(wcn->dev, &wcn->dxe_rx_h_ch); in wcn36xx_dxe_init()
993 dev_err(wcn->dev, "Error allocating descriptor\n"); in wcn36xx_dxe_init()
998 wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_h_ch); in wcn36xx_dxe_init()
1001 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_H, in wcn36xx_dxe_init()
1002 wcn->dxe_rx_h_ch.head_blk_ctl->desc_phy_addr); in wcn36xx_dxe_init()
1005 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_init()
1010 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_init()
1012 wcn->dxe_rx_h_ch.head_blk_ctl->desc->phy_next_l); in wcn36xx_dxe_init()
1015 wcn36xx_dxe_write_register(wcn, in wcn36xx_dxe_init()
1019 ret = wcn36xx_dxe_request_irqs(wcn); in wcn36xx_dxe_init()
1023 timer_setup(&wcn->tx_ack_timer, wcn36xx_dxe_tx_timer, 0); in wcn36xx_dxe_init()
1026 wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_L); in wcn36xx_dxe_init()
1027 wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_H); in wcn36xx_dxe_init()
1028 wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_L); in wcn36xx_dxe_init()
1029 wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_H); in wcn36xx_dxe_init()
1034 wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_rx_h_ch); in wcn36xx_dxe_init()
1036 wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_rx_l_ch); in wcn36xx_dxe_init()
1038 wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_tx_h_ch); in wcn36xx_dxe_init()
1040 wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_tx_l_ch); in wcn36xx_dxe_init()
1045 void wcn36xx_dxe_deinit(struct wcn36xx *wcn) in wcn36xx_dxe_deinit() argument
1050 wcn36xx_dxe_disable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_H); in wcn36xx_dxe_deinit()
1051 wcn36xx_dxe_disable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_L); in wcn36xx_dxe_deinit()
1052 wcn36xx_dxe_disable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_H); in wcn36xx_dxe_deinit()
1053 wcn36xx_dxe_disable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_L); in wcn36xx_dxe_deinit()
1055 free_irq(wcn->tx_irq, wcn); in wcn36xx_dxe_deinit()
1056 free_irq(wcn->rx_irq, wcn); in wcn36xx_dxe_deinit()
1057 del_timer(&wcn->tx_ack_timer); in wcn36xx_dxe_deinit()
1059 if (wcn->tx_ack_skb) { in wcn36xx_dxe_deinit()
1060 ieee80211_tx_status_irqsafe(wcn->hw, wcn->tx_ack_skb); in wcn36xx_dxe_deinit()
1061 wcn->tx_ack_skb = NULL; in wcn36xx_dxe_deinit()
1066 wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data); in wcn36xx_dxe_deinit()
1068 wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_l_ch); in wcn36xx_dxe_deinit()
1069 wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_h_ch); in wcn36xx_dxe_deinit()
1071 wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_tx_l_ch); in wcn36xx_dxe_deinit()
1072 wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_tx_h_ch); in wcn36xx_dxe_deinit()
1073 wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_rx_l_ch); in wcn36xx_dxe_deinit()
1074 wcn36xx_dxe_deinit_descs(wcn->dev, &wcn->dxe_rx_h_ch); in wcn36xx_dxe_deinit()