Lines Matching refs:ath5k_hw_rfb_op

193 ath5k_hw_rfb_op(struct ath5k_hw *ah, const struct ath5k_rf_reg *rf_regs,  in ath5k_hw_rfb_op()  function
507 if (ath5k_hw_rfb_op(ah, rf_regs, 0, AR5K_RF_MIXVGA_OVR, false) != 1) in ath5k_hw_rf_gainf_corr()
511 step = ath5k_hw_rfb_op(ah, rf_regs, 0, AR5K_RF_MIXGAIN_STEP, false); in ath5k_hw_rf_gainf_corr()
559 step = ath5k_hw_rfb_op(ah, rf_regs, 0, AR5K_RF_RFGAIN_STEP, in ath5k_hw_rf_check_gainf_readback()
576 mix_ovr = ath5k_hw_rfb_op(ah, rf_regs, 0, AR5K_RF_MIXVGA_OVR, in ath5k_hw_rf_check_gainf_readback()
936 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_ob[ee_mode][obdb], in ath5k_hw_rfregs_init()
939 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_db[ee_mode][obdb], in ath5k_hw_rfregs_init()
957 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_ob[ee_mode][obdb], in ath5k_hw_rfregs_init()
960 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_db[ee_mode][obdb], in ath5k_hw_rfregs_init()
969 ath5k_hw_rfb_op(ah, rf_regs, 1, AR5K_RF_TURBO, false); in ath5k_hw_rfregs_init()
981 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[1], in ath5k_hw_rfregs_init()
984 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[2], in ath5k_hw_rfregs_init()
987 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[3], in ath5k_hw_rfregs_init()
998 ath5k_hw_rfb_op(ah, rf_regs, !ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1001 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_x_gain[ee_mode], in ath5k_hw_rfregs_init()
1004 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_i_gain[ee_mode], in ath5k_hw_rfregs_init()
1007 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1015 ath5k_hw_rfb_op(ah, rf_regs, 0x1f, in ath5k_hw_rfregs_init()
1021 ath5k_hw_rfb_op(ah, rf_regs, wait_i, in ath5k_hw_rfregs_init()
1023 ath5k_hw_rfb_op(ah, rf_regs, 3, in ath5k_hw_rfregs_init()
1034 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[0], in ath5k_hw_rfregs_init()
1037 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[1], in ath5k_hw_rfregs_init()
1040 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[2], in ath5k_hw_rfregs_init()
1043 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[3], in ath5k_hw_rfregs_init()
1046 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[4], in ath5k_hw_rfregs_init()
1049 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[5], in ath5k_hw_rfregs_init()
1052 ath5k_hw_rfb_op(ah, rf_regs, g_step->gos_param[6], in ath5k_hw_rfregs_init()
1062 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_xpd[ee_mode], in ath5k_hw_rfregs_init()
1067 ath5k_hw_rfb_op(ah, rf_regs, in ath5k_hw_rfregs_init()
1074 ath5k_hw_rfb_op(ah, rf_regs, in ath5k_hw_rfregs_init()
1077 ath5k_hw_rfb_op(ah, rf_regs, in ath5k_hw_rfregs_init()
1081 ath5k_hw_rfb_op(ah, rf_regs, in ath5k_hw_rfregs_init()
1084 ath5k_hw_rfb_op(ah, rf_regs, in ath5k_hw_rfregs_init()
1092 ath5k_hw_rfb_op(ah, rf_regs, 2, in ath5k_hw_rfregs_init()
1095 ath5k_hw_rfb_op(ah, rf_regs, 2, in ath5k_hw_rfregs_init()
1098 ath5k_hw_rfb_op(ah, rf_regs, 2, in ath5k_hw_rfregs_init()
1101 ath5k_hw_rfb_op(ah, rf_regs, 2, in ath5k_hw_rfregs_init()
1107 ath5k_hw_rfb_op(ah, rf_regs, 1, in ath5k_hw_rfregs_init()
1110 ath5k_hw_rfb_op(ah, rf_regs, 1, in ath5k_hw_rfregs_init()
1113 ath5k_hw_rfb_op(ah, rf_regs, 1, in ath5k_hw_rfregs_init()
1116 ath5k_hw_rfb_op(ah, rf_regs, 1, in ath5k_hw_rfregs_init()
1119 ath5k_hw_rfb_op(ah, rf_regs, 1, in ath5k_hw_rfregs_init()
1124 ath5k_hw_rfb_op(ah, rf_regs, ee->ee_i_gain[ee_mode], in ath5k_hw_rfregs_init()
1135 ath5k_hw_rfb_op(ah, rf_regs, pd_delay, in ath5k_hw_rfregs_init()
1137 ath5k_hw_rfb_op(ah, rf_regs, 0xf, in ath5k_hw_rfregs_init()
1146 ath5k_hw_rfb_op(ah, rf_regs, 1, AR5K_RF_DERBY_CHAN_SEL_MODE, in ath5k_hw_rfregs_init()
1152 ath5k_hw_rfb_op(ah, rf_regs, ath5k_hw_bitswap(6, 3), in ath5k_hw_rfregs_init()