Lines Matching refs:rc
111 int rc = 0; in lan937x_dsp_workaround() local
116 rc = phy_read(phydev, LAN87XX_EXT_REG_CTL); in lan937x_dsp_workaround()
117 if (rc < 0) in lan937x_dsp_workaround()
121 prev_bank = FIELD_GET(LAN87XX_REG_BANK_SEL_MASK, rc); in lan937x_dsp_workaround()
130 rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, val); in lan937x_dsp_workaround()
136 return rc; in lan937x_dsp_workaround()
143 int rc = 0; in access_ereg() local
150 rc = phy_write(phydev, offset, val); in access_ereg()
152 rc = phy_read(phydev, offset); in access_ereg()
153 return rc; in access_ereg()
158 rc = phy_write(phydev, LAN87XX_EXT_REG_WR_DATA, val); in access_ereg()
159 if (rc < 0) in access_ereg()
160 return rc; in access_ereg()
169 rc = lan937x_dsp_workaround(phydev, ereg, bank); in access_ereg()
170 if (rc < 0) in access_ereg()
171 return rc; in access_ereg()
174 rc = phy_write(phydev, LAN87XX_EXT_REG_CTL, ereg); in access_ereg()
175 if (rc < 0) in access_ereg()
176 return rc; in access_ereg()
179 rc = phy_read(phydev, LAN87XX_EXT_REG_RD_DATA); in access_ereg()
181 return rc; in access_ereg()
187 int new = 0, rc = 0; in access_ereg_modify_changed() local
192 rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, bank, offset, val); in access_ereg_modify_changed()
193 if (rc < 0) in access_ereg_modify_changed()
194 return rc; in access_ereg_modify_changed()
196 new = val | (rc & (mask ^ 0xFFFF)); in access_ereg_modify_changed()
197 rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, bank, offset, new); in access_ereg_modify_changed()
199 return rc; in access_ereg_modify_changed()
213 int rc; in lan87xx_config_rgmii_delay() local
218 rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, in lan87xx_config_rgmii_delay()
220 if (rc < 0) in lan87xx_config_rgmii_delay()
221 return rc; in lan87xx_config_rgmii_delay()
225 rc &= ~LAN87XX_MASK_RGMII_TXC_DLY_EN; in lan87xx_config_rgmii_delay()
226 rc &= ~LAN87XX_MASK_RGMII_RXC_DLY_EN; in lan87xx_config_rgmii_delay()
229 rc |= LAN87XX_MASK_RGMII_TXC_DLY_EN; in lan87xx_config_rgmii_delay()
230 rc |= LAN87XX_MASK_RGMII_RXC_DLY_EN; in lan87xx_config_rgmii_delay()
233 rc &= ~LAN87XX_MASK_RGMII_TXC_DLY_EN; in lan87xx_config_rgmii_delay()
234 rc |= LAN87XX_MASK_RGMII_RXC_DLY_EN; in lan87xx_config_rgmii_delay()
237 rc |= LAN87XX_MASK_RGMII_TXC_DLY_EN; in lan87xx_config_rgmii_delay()
238 rc &= ~LAN87XX_MASK_RGMII_RXC_DLY_EN; in lan87xx_config_rgmii_delay()
245 PHYACC_ATTR_BANK_MISC, LAN87XX_CTRL_1, rc); in lan87xx_config_rgmii_delay()
400 int rc, i; in lan87xx_phy_init() local
403 rc = genphy_soft_reset(phydev); in lan87xx_phy_init()
404 if (rc < 0) in lan87xx_phy_init()
405 return rc; in lan87xx_phy_init()
411 rc = access_smi_poll_timeout(phydev, in lan87xx_phy_init()
416 rc = access_ereg(phydev, init[i].mode, init[i].bank, in lan87xx_phy_init()
419 if (rc < 0) in lan87xx_phy_init()
420 return rc; in lan87xx_phy_init()
428 int rc, val = 0; in lan87xx_phy_config_intr() local
432 rc = phy_write(phydev, LAN87XX_INTERRUPT_MASK, val); in lan87xx_phy_config_intr()
433 if (rc < 0) in lan87xx_phy_config_intr()
434 return rc; in lan87xx_phy_config_intr()
436 rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_config_intr()
437 if (rc < 0) in lan87xx_phy_config_intr()
438 return rc; in lan87xx_phy_config_intr()
440 rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, in lan87xx_phy_config_intr()
443 if (rc < 0) in lan87xx_phy_config_intr()
444 return rc; in lan87xx_phy_config_intr()
446 rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, in lan87xx_phy_config_intr()
449 if (rc < 0) in lan87xx_phy_config_intr()
450 return rc; in lan87xx_phy_config_intr()
454 rc = phy_write(phydev, LAN87XX_INTERRUPT_MASK, val); in lan87xx_phy_config_intr()
455 if (rc < 0) in lan87xx_phy_config_intr()
456 return rc; in lan87xx_phy_config_intr()
459 rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, in lan87xx_phy_config_intr()
463 rc = phy_write(phydev, LAN87XX_INTERRUPT_MASK, val); in lan87xx_phy_config_intr()
464 if (rc < 0) in lan87xx_phy_config_intr()
465 return rc; in lan87xx_phy_config_intr()
467 rc = phy_read(phydev, LAN87XX_INTERRUPT_SOURCE); in lan87xx_phy_config_intr()
468 if (rc < 0) in lan87xx_phy_config_intr()
469 return rc; in lan87xx_phy_config_intr()
471 rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, in lan87xx_phy_config_intr()
474 if (rc < 0) in lan87xx_phy_config_intr()
475 return rc; in lan87xx_phy_config_intr()
477 rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, in lan87xx_phy_config_intr()
482 return rc < 0 ? rc : 0; in lan87xx_phy_config_intr()
513 int rc = lan87xx_phy_init(phydev); in lan87xx_config_init() local
515 return rc < 0 ? rc : 0; in lan87xx_config_init()
578 int rc, i; in lan87xx_cable_test_start() local
580 rc = microchip_cable_test_start_common(phydev); in lan87xx_cable_test_start()
581 if (rc < 0) in lan87xx_cable_test_start()
582 return rc; in lan87xx_cable_test_start()
586 rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI, in lan87xx_cable_test_start()
588 if (rc < 0) in lan87xx_cable_test_start()
589 return rc; in lan87xx_cable_test_start()
592 rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_SMI, in lan87xx_cable_test_start()
594 if (rc < 0) in lan87xx_cable_test_start()
595 return rc; in lan87xx_cable_test_start()
597 if ((rc & 0x4000) != 0x4000) { in lan87xx_cable_test_start()
599 rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_AFE, in lan87xx_cable_test_start()
601 if (rc < 0) in lan87xx_cable_test_start()
602 return rc; in lan87xx_cable_test_start()
603 rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI, in lan87xx_cable_test_start()
605 if (rc < 0) in lan87xx_cable_test_start()
606 return rc; in lan87xx_cable_test_start()
609 rc = access_ereg_modify_changed(phydev, PHYACC_ATTR_BANK_SMI, in lan87xx_cable_test_start()
611 if (rc < 0) in lan87xx_cable_test_start()
612 return rc; in lan87xx_cable_test_start()
617 rc = access_ereg_modify_changed(phydev, in lan87xx_cable_test_start()
625 rc = access_ereg(phydev, cable_test[i].mode, in lan87xx_cable_test_start()
630 if (rc < 0) in lan87xx_cable_test_start()
631 return rc; in lan87xx_cable_test_start()
720 int rc = 0; in lan87xx_cable_test_get_status() local
725 rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, PHYACC_ATTR_BANK_DSP, in lan87xx_cable_test_get_status()
727 if (rc < 0) in lan87xx_cable_test_get_status()
728 return rc; in lan87xx_cable_test_get_status()
730 if ((rc & 2) == 2) { in lan87xx_cable_test_get_status()
732 rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, in lan87xx_cable_test_get_status()
735 if (rc < 0) in lan87xx_cable_test_get_status()
736 return rc; in lan87xx_cable_test_get_status()
748 int rc = 0; in lan87xx_read_status() local
750 rc = phy_read(phydev, T1_MODE_STAT_REG); in lan87xx_read_status()
751 if (rc < 0) in lan87xx_read_status()
752 return rc; in lan87xx_read_status()
754 if (rc & T1_LINK_UP_MSK) in lan87xx_read_status()
764 rc = genphy_read_master_slave(phydev); in lan87xx_read_status()
765 if (rc < 0) in lan87xx_read_status()
766 return rc; in lan87xx_read_status()
768 rc = genphy_read_status_fixed(phydev); in lan87xx_read_status()
769 if (rc < 0) in lan87xx_read_status()
770 return rc; in lan87xx_read_status()
772 return rc; in lan87xx_read_status()
799 int rc; in lan87xx_get_sqi() local
801 rc = access_ereg(phydev, PHYACC_ATTR_MODE_WRITE, in lan87xx_get_sqi()
803 if (rc < 0) in lan87xx_get_sqi()
804 return rc; in lan87xx_get_sqi()
806 rc = access_ereg(phydev, PHYACC_ATTR_MODE_READ, in lan87xx_get_sqi()
808 if (rc < 0) in lan87xx_get_sqi()
809 return rc; in lan87xx_get_sqi()
811 sqi_value = FIELD_GET(T1_DCQ_SQI_MSK, rc); in lan87xx_get_sqi()