Lines Matching refs:mem_crb

1441 	void __iomem *mem_crb;  in netxen_nic_pci_mem_write_128M()  local
1450 mem_crb = pci_base_offset(adapter, in netxen_nic_pci_mem_write_128M()
1461 mem_crb = pci_base_offset(adapter, in netxen_nic_pci_mem_write_128M()
1485 writel(off_lo, (mem_crb + MIU_TEST_AGT_ADDR_LO)); in netxen_nic_pci_mem_write_128M()
1486 writel(off_hi, (mem_crb + addr_hi)); in netxen_nic_pci_mem_write_128M()
1487 writel(data & 0xffffffff, (mem_crb + data_lo)); in netxen_nic_pci_mem_write_128M()
1488 writel((data >> 32) & 0xffffffff, (mem_crb + data_hi)); in netxen_nic_pci_mem_write_128M()
1489 writel((TA_CTL_ENABLE | TA_CTL_WRITE), (mem_crb + TEST_AGT_CTRL)); in netxen_nic_pci_mem_write_128M()
1491 (mem_crb + TEST_AGT_CTRL)); in netxen_nic_pci_mem_write_128M()
1494 temp = readl((mem_crb + TEST_AGT_CTRL)); in netxen_nic_pci_mem_write_128M()
1519 void __iomem *mem_crb; in netxen_nic_pci_mem_read_128M() local
1528 mem_crb = pci_base_offset(adapter, in netxen_nic_pci_mem_read_128M()
1539 mem_crb = pci_base_offset(adapter, in netxen_nic_pci_mem_read_128M()
1563 writel(off_lo, (mem_crb + MIU_TEST_AGT_ADDR_LO)); in netxen_nic_pci_mem_read_128M()
1564 writel(off_hi, (mem_crb + addr_hi)); in netxen_nic_pci_mem_read_128M()
1565 writel(TA_CTL_ENABLE, (mem_crb + TEST_AGT_CTRL)); in netxen_nic_pci_mem_read_128M()
1566 writel((TA_CTL_START|TA_CTL_ENABLE), (mem_crb + TEST_AGT_CTRL)); in netxen_nic_pci_mem_read_128M()
1569 temp = readl(mem_crb + TEST_AGT_CTRL); in netxen_nic_pci_mem_read_128M()
1581 temp = readl(mem_crb + data_hi); in netxen_nic_pci_mem_read_128M()
1583 val |= readl(mem_crb + data_lo); in netxen_nic_pci_mem_read_128M()
1600 void __iomem *mem_crb; in netxen_nic_pci_mem_write_2M() local
1609 mem_crb = netxen_get_ioaddr(adapter, in netxen_nic_pci_mem_write_2M()
1615 mem_crb = netxen_get_ioaddr(adapter, in netxen_nic_pci_mem_write_2M()
1630 writel(off8, (mem_crb + MIU_TEST_AGT_ADDR_LO)); in netxen_nic_pci_mem_write_2M()
1631 writel(0, (mem_crb + MIU_TEST_AGT_ADDR_HI)); in netxen_nic_pci_mem_write_2M()
1634 mem_crb + MIU_TEST_AGT_WRDATA_LO); in netxen_nic_pci_mem_write_2M()
1636 mem_crb + MIU_TEST_AGT_WRDATA_HI); in netxen_nic_pci_mem_write_2M()
1638 writel((TA_CTL_ENABLE | TA_CTL_WRITE), (mem_crb + TEST_AGT_CTRL)); in netxen_nic_pci_mem_write_2M()
1640 (mem_crb + TEST_AGT_CTRL)); in netxen_nic_pci_mem_write_2M()
1643 temp = readl(mem_crb + TEST_AGT_CTRL); in netxen_nic_pci_mem_write_2M()
1668 void __iomem *mem_crb; in netxen_nic_pci_mem_read_2M() local
1677 mem_crb = netxen_get_ioaddr(adapter, in netxen_nic_pci_mem_read_2M()
1683 mem_crb = netxen_get_ioaddr(adapter, in netxen_nic_pci_mem_read_2M()
1700 writel(off8, (mem_crb + MIU_TEST_AGT_ADDR_LO)); in netxen_nic_pci_mem_read_2M()
1701 writel(0, (mem_crb + MIU_TEST_AGT_ADDR_HI)); in netxen_nic_pci_mem_read_2M()
1702 writel(TA_CTL_ENABLE, (mem_crb + TEST_AGT_CTRL)); in netxen_nic_pci_mem_read_2M()
1703 writel((TA_CTL_START | TA_CTL_ENABLE), (mem_crb + TEST_AGT_CTRL)); in netxen_nic_pci_mem_read_2M()
1706 temp = readl(mem_crb + TEST_AGT_CTRL); in netxen_nic_pci_mem_read_2M()
1717 val = (u64)(readl(mem_crb + MIU_TEST_AGT_RDDATA_HI)) << 32; in netxen_nic_pci_mem_read_2M()
1718 val |= readl(mem_crb + MIU_TEST_AGT_RDDATA_LO); in netxen_nic_pci_mem_read_2M()