2469 	int vfs = rvu->vfs;  in rvu_mbox_intr_handler()  local
2484 	if (vfs > 64) {  in rvu_mbox_intr_handler()
2488 		rvu_queue_work(&rvu->afvf_wq_info, 64, vfs, intr);  in rvu_mbox_intr_handler()
2489 		vfs -= 64;  in rvu_mbox_intr_handler()
2497 	rvu_queue_work(&rvu->afvf_wq_info, 0, vfs, intr);  in rvu_mbox_intr_handler()
2672 	if (rvu->vfs > 64)  in rvu_flr_intr_handler()
2673 		rvu_afvf_queue_flr_work(rvu, 64, rvu->vfs - 64);  in rvu_flr_intr_handler()
3013 	int vfs = rvu->vfs;  in rvu_disable_afvf_intr()  local
3015 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3016 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3017 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(0), INTR_MASK(vfs));  in rvu_disable_afvf_intr()
3018 	if (vfs <= 64)  in rvu_disable_afvf_intr()
3022 		      INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3023 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3024 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1CX(1), INTR_MASK(vfs - 64));  in rvu_disable_afvf_intr()
3029 	int vfs = rvu->vfs;  in rvu_enable_afvf_intr()  local
3035 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3036 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3039 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3040 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3041 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(0), INTR_MASK(vfs));  in rvu_enable_afvf_intr()
3044 	if (vfs <= 64)  in rvu_enable_afvf_intr()
3047 	rvupf_write64(rvu, RVU_PF_VFPF_MBOX_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3049 		      INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3051 	rvupf_write64(rvu, RVU_PF_VFFLR_INTX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3052 	rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3053 	rvupf_write64(rvu, RVU_PF_VFME_INT_ENA_W1SX(1), INTR_MASK(vfs - 64));  in rvu_enable_afvf_intr()
3083 	int err, chans, vfs;  in rvu_enable_sriov()  local
3095 	vfs = pci_sriov_get_totalvfs(pdev);  in rvu_enable_sriov()
3098 	if (vfs > chans)  in rvu_enable_sriov()
3099 		vfs = chans;  in rvu_enable_sriov()
3101 	if (!vfs)  in rvu_enable_sriov()
3107 	if (vfs > 62)  in rvu_enable_sriov()
3108 		vfs = 62;  in rvu_enable_sriov()
3114 	rvu->vfs = vfs;  in rvu_enable_sriov()
3116 	err = rvu_mbox_init(rvu, &rvu->afvf_wq_info, TYPE_AFVF, vfs,  in rvu_enable_sriov()
3125 	err = pci_enable_sriov(pdev, vfs);  in rvu_enable_sriov()