Lines Matching refs:icr0
4139 u32 icr0, icr0_remaining; in i40e_intr() local
4142 icr0 = rd32(hw, I40E_PFINT_ICR0); in i40e_intr()
4146 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) in i40e_intr()
4150 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || in i40e_intr()
4151 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) in i40e_intr()
4155 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { in i40e_intr()
4162 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { in i40e_intr()
4176 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { in i40e_intr()
4182 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { in i40e_intr()
4187 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { in i40e_intr()
4200 if (icr0 & I40E_PFINT_ICR0_GRST_MASK) { in i40e_intr()
4217 if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK) { in i40e_intr()
4218 icr0 &= ~I40E_PFINT_ICR0_HMC_ERR_MASK; in i40e_intr()
4225 if (icr0 & I40E_PFINT_ICR0_TIMESYNC_MASK) { in i40e_intr()
4234 icr0 &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; in i40e_intr()
4241 icr0_remaining = icr0 & ena_mask; in i40e_intr()