185 	completion_queue_slots = rx->dqo.complq.mask + 1;  in gve_rx_free_ring_dqo()
210 	if (rx->dqo.complq.desc_ring) {  in gve_rx_free_ring_dqo()
211 		size = sizeof(rx->dqo.complq.desc_ring[0]) *  in gve_rx_free_ring_dqo()
213 		dma_free_coherent(hdev, size, rx->dqo.complq.desc_ring,  in gve_rx_free_ring_dqo()
214 				  rx->dqo.complq.bus);  in gve_rx_free_ring_dqo()
215 		rx->dqo.complq.desc_ring = NULL;  in gve_rx_free_ring_dqo()
241 	rx->dqo.complq.num_free_slots = completion_queue_slots;  in gve_rx_alloc_ring_dqo()
242 	rx->dqo.complq.mask = completion_queue_slots - 1;  in gve_rx_alloc_ring_dqo()
264 	size = sizeof(rx->dqo.complq.desc_ring[0]) *  in gve_rx_alloc_ring_dqo()
266 	rx->dqo.complq.desc_ring =  in gve_rx_alloc_ring_dqo()
267 		dma_alloc_coherent(hdev, size, &rx->dqo.complq.bus, GFP_KERNEL);  in gve_rx_alloc_ring_dqo()
268 	if (!rx->dqo.complq.desc_ring)  in gve_rx_alloc_ring_dqo()
334 	struct gve_rx_compl_queue_dqo *complq = &rx->dqo.complq;  in gve_rx_post_buffers_dqo()  local
344 	num_avail_slots = min_t(u32, num_avail_slots, complq->num_free_slots);  in gve_rx_post_buffers_dqo()
369 		complq->num_free_slots--;  in gve_rx_post_buffers_dqo()
669 	struct gve_rx_compl_queue_dqo *complq = &rx->dqo.complq;  in gve_rx_poll_dqo()  local
677 			&complq->desc_ring[complq->head];  in gve_rx_poll_dqo()
681 		if (compl_desc->generation == complq->cur_gen_bit)  in gve_rx_poll_dqo()
685 		prefetch(&complq->desc_ring[(complq->head + 1) & complq->mask]);  in gve_rx_poll_dqo()
686 		prefetch(&complq->desc_ring[(complq->head + 2) & complq->mask]);  in gve_rx_poll_dqo()
702 		complq->head = (complq->head + 1) & complq->mask;  in gve_rx_poll_dqo()
703 		complq->num_free_slots++;  in gve_rx_poll_dqo()
706 		complq->cur_gen_bit ^= (complq->head == 0);  in gve_rx_poll_dqo()