299 	status.bits32 = readl(port->gmac_base + GMAC_STATUS);  in gmac_speed_set()
300 	old_status.bits32 = status.bits32;  in gmac_speed_set()
344 	if (old_status.bits32 == status.bits32)  in gmac_speed_set()
357 	writel(status.bits32, port->gmac_base + GMAC_STATUS);  in gmac_speed_set()
364 	union gmac_status status = { .bits32 = 0 };  in gmac_setup_phy()
404 	writel(status.bits32, port->gmac_base + GMAC_STATUS);  in gmac_setup_phy()
518 	tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0);  in gmac_init()
520 	writel(config0.bits32, port->gmac_base + GMAC_CONFIG0);  in gmac_init()
521 	writel(config1.bits32, port->gmac_base + GMAC_CONFIG1);  in gmac_init()
522 	writel(config2.bits32, port->gmac_base + GMAC_CONFIG2);  in gmac_init()
523 	writel(config3.bits32, port->gmac_base + GMAC_CONFIG3);  in gmac_init()
526 	writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG);  in gmac_init()
528 	writel(hw_weigh.bits32,  in gmac_init()
530 	writel(sw_weigh.bits32,  in gmac_init()
629 		word3 = txd->word3.bits32;  in gmac_clean_txq()
651 		if (word1.bits32 & TSS_CHECKUM_ENABLE)  in gmac_clean_txq()
771 	rw.bits32 = readl(ptr_reg);  in gmac_cleanup_rxq()
884 	rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG);  in geth_fill_freeq()
962 	qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG);  in geth_setup_freeq()
964 	writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG);  in geth_setup_freeq()
967 	writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG);  in geth_setup_freeq()
1198 		txd->word0.bits32 = buflen;  in gmac_map_tx_bufs()
1199 		txd->word1.bits32 = word1;  in gmac_map_tx_bufs()
1201 		txd->word3.bits32 = word3;  in gmac_map_tx_bufs()
1245 	rw.bits32 = readl(ptr_reg);  in gmac_start_xmit()
1412 	rw.bits32 = readl(ptr_reg);  in gmac_rx()
1447 		if (word3.bits32 & SOF_BIT) {  in gmac_rx()
1466 		if (word3.bits32 & EOF_BIT)  in gmac_rx()
1482 		if (word3.bits32 & EOF_BIT) {  in gmac_rx()
1736 	dma_ctrl.bits32 = readl(dma_ctrl_reg);  in gmac_start_dma()
1749 	writel(dma_ctrl.bits32, dma_ctrl_reg);  in gmac_start_dma()
1757 	dma_ctrl.bits32 = readl(dma_ctrl_reg);  in gmac_stop_dma()
1760 	writel(dma_ctrl.bits32, dma_ctrl_reg);  in gmac_stop_dma()
1874 	writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR);  in gmac_set_rx_mode()
2102 	config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0);  in gmac_get_pauseparam()