50 static int micron_st_nor_octal_dtr_en(struct spi_nor *nor)  in micron_st_nor_octal_dtr_en()  argument
53 	u8 *buf = nor->bouncebuf;  in micron_st_nor_octal_dtr_en()
60 	ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);  in micron_st_nor_octal_dtr_en()
67 	ret = spi_nor_write_any_volatile_reg(nor, &op, nor->reg_proto);  in micron_st_nor_octal_dtr_en()
72 	ret = spi_nor_read_id(nor, 0, 8, buf, SNOR_PROTO_8_8_8_DTR);  in micron_st_nor_octal_dtr_en()
74 		dev_dbg(nor->dev, "error %d reading JEDEC ID after enabling 8D-8D-8D mode\n", ret);  in micron_st_nor_octal_dtr_en()
78 	if (memcmp(buf, nor->info->id, nor->info->id_len))  in micron_st_nor_octal_dtr_en()
84 static int micron_st_nor_octal_dtr_dis(struct spi_nor *nor)  in micron_st_nor_octal_dtr_dis()  argument
87 	u8 *buf = nor->bouncebuf;  in micron_st_nor_octal_dtr_dis()
102 	ret = spi_nor_write_any_volatile_reg(nor, &op, SNOR_PROTO_8_8_8_DTR);  in micron_st_nor_octal_dtr_dis()
107 	ret = spi_nor_read_id(nor, 0, 0, buf, SNOR_PROTO_1_1_1);  in micron_st_nor_octal_dtr_dis()
109 		dev_dbg(nor->dev, "error %d reading JEDEC ID after disabling 8D-8D-8D mode\n", ret);  in micron_st_nor_octal_dtr_dis()
113 	if (memcmp(buf, nor->info->id, nor->info->id_len))  in micron_st_nor_octal_dtr_dis()
119 static int micron_st_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)  in micron_st_nor_octal_dtr_enable()  argument
121 	return enable ? micron_st_nor_octal_dtr_en(nor) :  in micron_st_nor_octal_dtr_enable()
122 			micron_st_nor_octal_dtr_dis(nor);  in micron_st_nor_octal_dtr_enable()
125 static void mt35xu512aba_default_init(struct spi_nor *nor)  in mt35xu512aba_default_init()  argument
127 	nor->params->octal_dtr_enable = micron_st_nor_octal_dtr_enable;  in mt35xu512aba_default_init()
130 static void mt35xu512aba_post_sfdp_fixup(struct spi_nor *nor)  in mt35xu512aba_post_sfdp_fixup()  argument
133 	nor->params->hwcaps.mask |= SNOR_HWCAPS_READ_8_8_8_DTR;  in mt35xu512aba_post_sfdp_fixup()
134 	spi_nor_set_read_settings(&nor->params->reads[SNOR_CMD_READ_8_8_8_DTR],  in mt35xu512aba_post_sfdp_fixup()
138 	nor->cmd_ext_type = SPI_NOR_EXT_REPEAT;  in mt35xu512aba_post_sfdp_fixup()
139 	nor->params->rdsr_dummy = 8;  in mt35xu512aba_post_sfdp_fixup()
140 	nor->params->rdsr_addr_nbytes = 0;  in mt35xu512aba_post_sfdp_fixup()
147 	nor->params->quad_enable = NULL;  in mt35xu512aba_post_sfdp_fixup()
307 static int micron_st_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable)  in micron_st_nor_set_4byte_addr_mode()  argument
311 	ret = spi_nor_write_enable(nor);  in micron_st_nor_set_4byte_addr_mode()
315 	ret = spi_nor_set_4byte_addr_mode(nor, enable);  in micron_st_nor_set_4byte_addr_mode()
319 	return spi_nor_write_disable(nor);  in micron_st_nor_set_4byte_addr_mode()
331 static int micron_st_nor_read_fsr(struct spi_nor *nor, u8 *fsr)  in micron_st_nor_read_fsr()  argument
335 	if (nor->spimem) {  in micron_st_nor_read_fsr()
338 		if (nor->reg_proto == SNOR_PROTO_8_8_8_DTR) {  in micron_st_nor_read_fsr()
339 			op.addr.nbytes = nor->params->rdsr_addr_nbytes;  in micron_st_nor_read_fsr()
340 			op.dummy.nbytes = nor->params->rdsr_dummy;  in micron_st_nor_read_fsr()
348 		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);  in micron_st_nor_read_fsr()
350 		ret = spi_mem_exec_op(nor->spimem, &op);  in micron_st_nor_read_fsr()
352 		ret = spi_nor_controller_ops_read_reg(nor, SPINOR_OP_RDFSR, fsr,  in micron_st_nor_read_fsr()
357 		dev_dbg(nor->dev, "error %d reading FSR\n", ret);  in micron_st_nor_read_fsr()
366 static void micron_st_nor_clear_fsr(struct spi_nor *nor)  in micron_st_nor_clear_fsr()  argument
370 	if (nor->spimem) {  in micron_st_nor_clear_fsr()
373 		spi_nor_spimem_setup_op(nor, &op, nor->reg_proto);  in micron_st_nor_clear_fsr()
375 		ret = spi_mem_exec_op(nor->spimem, &op);  in micron_st_nor_clear_fsr()
377 		ret = spi_nor_controller_ops_write_reg(nor, SPINOR_OP_CLFSR,  in micron_st_nor_clear_fsr()
382 		dev_dbg(nor->dev, "error %d clearing FSR\n", ret);  in micron_st_nor_clear_fsr()
393 static int micron_st_nor_ready(struct spi_nor *nor)  in micron_st_nor_ready()  argument
397 	sr_ready = spi_nor_sr_ready(nor);  in micron_st_nor_ready()
401 	ret = micron_st_nor_read_fsr(nor, nor->bouncebuf);  in micron_st_nor_ready()
405 	if (nor->bouncebuf[0] & (FSR_E_ERR | FSR_P_ERR)) {  in micron_st_nor_ready()
406 		if (nor->bouncebuf[0] & FSR_E_ERR)  in micron_st_nor_ready()
407 			dev_err(nor->dev, "Erase operation failed.\n");  in micron_st_nor_ready()
409 			dev_err(nor->dev, "Program operation failed.\n");  in micron_st_nor_ready()
411 		if (nor->bouncebuf[0] & FSR_PT_ERR)  in micron_st_nor_ready()
412 			dev_err(nor->dev,  in micron_st_nor_ready()
415 		micron_st_nor_clear_fsr(nor);  in micron_st_nor_ready()
423 		ret = spi_nor_write_disable(nor);  in micron_st_nor_ready()
430 	return sr_ready && !!(nor->bouncebuf[0] & FSR_READY);  in micron_st_nor_ready()
433 static void micron_st_nor_default_init(struct spi_nor *nor)  in micron_st_nor_default_init()  argument
435 	nor->flags |= SNOR_F_HAS_LOCK;  in micron_st_nor_default_init()
436 	nor->flags &= ~SNOR_F_HAS_16BIT_SR;  in micron_st_nor_default_init()
437 	nor->params->quad_enable = NULL;  in micron_st_nor_default_init()
438 	nor->params->set_4byte_addr_mode = micron_st_nor_set_4byte_addr_mode;  in micron_st_nor_default_init()
441 static void micron_st_nor_late_init(struct spi_nor *nor)  in micron_st_nor_late_init()  argument
443 	if (nor->info->mfr_flags & USE_FSR)  in micron_st_nor_late_init()
444 		nor->params->ready = micron_st_nor_ready;  in micron_st_nor_late_init()