109 static int arasan_phy_write(struct sdhci_host *host, u8 data, u8 offset)  in arasan_phy_write()  function
156 	    arasan_phy_write(host, val | RETB_ENBL | PDB_ENBL, IPAD_CTRL1) ||  in arasan_phy_init()
158 	    arasan_phy_write(host, val | RTRIM_EN, IPAD_CTRL2))  in arasan_phy_init()
166 	    arasan_phy_write(host, val | REN_CMND | REN_STRB, IOREN_CTRL1) ||  in arasan_phy_init()
168 	    arasan_phy_write(host, val | PU_CMD, IOPU_CTRL1) ||  in arasan_phy_init()
170 	    arasan_phy_write(host, val | PDB_CMND, CMD_CTRL) ||  in arasan_phy_init()
172 	    arasan_phy_write(host, val | REN_DATA, IOREN_CTRL2) ||  in arasan_phy_init()
174 	    arasan_phy_write(host, val | PU_DAT, IOPU_CTRL2) ||  in arasan_phy_init()
176 	    arasan_phy_write(host, val | PDB_DATA, DATA_CTRL) ||  in arasan_phy_init()
178 	    arasan_phy_write(host, val | PDB_STRB, STRB_CTRL) ||  in arasan_phy_init()
180 	    arasan_phy_write(host, val | PDB_CLOCK, CLK_CTRL) ||  in arasan_phy_init()
182 	    arasan_phy_write(host, val | MAX_CLK_BUF, CLKBUF_SEL) ||  in arasan_phy_init()
183 	    arasan_phy_write(host, LEGACY_MODE, MODE_CTRL))  in arasan_phy_init()
196 		ret = arasan_phy_write(host, 0x0, MODE_CTRL);  in arasan_phy_set()
198 		ret = arasan_phy_write(host, mode, MODE_CTRL);  in arasan_phy_set()
205 		ret = arasan_phy_write(host, IOPAD(val, drv_type), IPAD_CTRL1);  in arasan_phy_set()
210 		ret = arasan_phy_write(host, 0x0, OTAP_DELAY);  in arasan_phy_set()
213 		ret = arasan_phy_write(host, 0x0, ITAP_DELAY);  in arasan_phy_set()
215 		ret = arasan_phy_write(host, OTAPDLY(otap), OTAP_DELAY);  in arasan_phy_set()
219 			ret = arasan_phy_write(host, ITAPDLY(itap), ITAP_DELAY);  in arasan_phy_set()
221 			ret = arasan_phy_write(host, 0x0, ITAP_DELAY);  in arasan_phy_set()
226 		ret = arasan_phy_write(host, trim, DLL_TRIM);  in arasan_phy_set()
230 	ret = arasan_phy_write(host, 0, DLL_STATUS);  in arasan_phy_set()
234 		ret = arasan_phy_write(host, FREQSEL(clk), DLL_STATUS);  in arasan_phy_set()