3159 	gpio_bits(LM1882_SYNC_DRIVE,LM1882_SYNC_DRIVE);  in init_ids_eagle()
3170 	gpio_bits(3, input & 3);  in eagle_muxsel()
3180 	gpio_bits(LM1882_SYNC_DRIVE,LM1882_SYNC_DRIVE);  in eagle_muxsel()
3214 	gpio_bits( 0xf, inmux );  in sigmaSQ_muxsel()
3221 	gpio_bits( 3<<9, inmux<<9 );  in sigmaSLC_muxsel()
3228 	gpio_bits(0xf, inmux);  in geovision_muxsel()
3243 	gpio_bits((1<<18) | 0xff, value);  in td3116_latch_value()
3244 	gpio_bits((1<<18) | 0xff, (1<<18) | value);  in td3116_latch_value()
3246 	gpio_bits((1<<18) | 0xff, value);  in td3116_latch_value()
3751 	gpio_bits((1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren), val);  in bttv_tea575x_set_pins()
3754 		gpio_bits(btv->mbox_iow | btv->mbox_csel, 0);  in bttv_tea575x_set_pins()
3757 		gpio_bits(btv->mbox_ior | btv->mbox_iow | btv->mbox_csel,  in bttv_tea575x_set_pins()
3771 		gpio_bits(btv->mbox_ior | btv->mbox_csel, 0);  in bttv_tea575x_get_pins()
3777 		gpio_bits(btv->mbox_ior | btv->mbox_iow | btv->mbox_csel,  in bttv_tea575x_get_pins()
3880 			gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
3882 				gpio_bits(BTTV_ALT_DATA,BTTV_ALT_DATA);  in pvr_altera_load()
3884 				gpio_bits(BTTV_ALT_DATA,0);  in pvr_altera_load()
3885 			gpio_bits(BTTV_ALT_DCLK,BTTV_ALT_DCLK);  in pvr_altera_load()
3889 	gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
3894 		gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
3895 		gpio_bits(BTTV_ALT_DCLK,BTTV_ALT_DCLK);  in pvr_altera_load()
3897 	gpio_bits(BTTV_ALT_DCLK,0);  in pvr_altera_load()
4104 	gpio_bits(bttv_tvcards[btv->c.type].gpiomask, gpiobits);  in bttv_tda9880_setnorm()
4121 	gpio_bits(mask,0);  in boot_msp34xx()
4124 	gpio_bits(mask,mask);  in boot_msp34xx()
4154 	gpio_bits(0xffffff, 0);  in init_PXC200()
4396 	gpio_bits(0x07f, muxgpio[input]);  in rv605_muxsel()
4399 	gpio_bits(0x200,0x200);  in rv605_muxsel()
4401 	gpio_bits(0x200,0x000);  in rv605_muxsel()
4405 	gpio_bits(0x480,0x480);  in rv605_muxsel()
4407 	gpio_bits(0x480,0x080);  in rv605_muxsel()
4442 	gpio_bits(0x0f0000, input << 16);  in tibetCS16_muxsel()
4486 	gpio_bits(0x1ff, udata);		/* write ADDR and DAT */  in kodicom4400r_write()
4487 	gpio_bits(0x1ff, udata | (1 << 8));	/* strobe high */  in kodicom4400r_write()
4488 	gpio_bits(0x1ff, udata);		/* strobe low */  in kodicom4400r_write()
4751 	gpio_bits(0x3, mux);  in phytec_muxsel()
4787 	gpio_bits(0x1007f, ADDRESS | CSELECT);	/* write ADDRESS and CSELECT */  in gv800s_write()
4788 	gpio_bits(0x20000, STROBE);		/* STROBE high */  in gv800s_write()
4789 	gpio_bits(0x40000, DATA);		/* write DATA */  in gv800s_write()
4790 	gpio_bits(0x20000, ~STROBE);		/* STROBE low */  in gv800s_write()