Lines Matching refs:DEFINE_QBCM

169 DEFINE_QBCM(bcm_acv, "ACV", false, &ebi);
170 DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi);
171 DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc);
172 DEFINE_QBCM(bcm_mm0, "MM0", true, &qns_mem_noc_hf);
173 DEFINE_QBCM(bcm_ce0, "CE0", false, &qxm_crypto);
174 DEFINE_QBCM(bcm_ip0, "IP0", false, &ipa_core_slave);
175 DEFINE_QBCM(bcm_mm1, "MM1", false, &qnm_camnoc_hf, &qxm_mdp0, &qxm_mdp1);
176 DEFINE_QBCM(bcm_sh2, "SH2", false, &alm_gpu_tcu, &alm_sys_tcu);
177 DEFINE_QBCM(bcm_mm2, "MM2", false, &qns_mem_noc_sf);
178 DEFINE_QBCM(bcm_qup0, "QUP0", false, &qhm_qup1, &qhm_qup2, &qhm_qup0);
179 DEFINE_QBCM(bcm_sh3, "SH3", false, &qnm_cmpnoc);
180 DEFINE_QBCM(bcm_mm3, "MM3", false, &qnm_camnoc_icp, &qnm_camnoc_sf, &qnm_video0, &qnm_video1, &qnm_…
181 DEFINE_QBCM(bcm_sh4, "SH4", false, &chm_apps);
182 DEFINE_QBCM(bcm_sn0, "SN0", true, &qns_gemnoc_sf);
183 DEFINE_QBCM(bcm_co0, "CO0", false, &qns_cdsp_mem_noc);
184 DEFINE_QBCM(bcm_cn0, "CN0", true, &qnm_snoc, &xm_qdss_dap, &qhs_a1_noc_cfg, &qhs_a2_noc_cfg, &qhs_a…
185 DEFINE_QBCM(bcm_sn1, "SN1", false, &qxs_imem);
186 DEFINE_QBCM(bcm_sn2, "SN2", false, &qns_gemnoc_gc);
187 DEFINE_QBCM(bcm_co2, "CO2", false, &qnm_npu);
188 DEFINE_QBCM(bcm_sn3, "SN3", false, &qxs_pimem);
189 DEFINE_QBCM(bcm_sn4, "SN4", false, &xs_qdss_stm);
190 DEFINE_QBCM(bcm_sn5, "SN5", false, &xs_pcie_modem);
191 DEFINE_QBCM(bcm_sn6, "SN6", false, &xs_pcie_0, &xs_pcie_1);
192 DEFINE_QBCM(bcm_sn7, "SN7", false, &qnm_aggre1_noc);
193 DEFINE_QBCM(bcm_sn8, "SN8", false, &qnm_aggre2_noc);
194 DEFINE_QBCM(bcm_sn9, "SN9", false, &qnm_gemnoc_pcie);
195 DEFINE_QBCM(bcm_sn11, "SN11", false, &qnm_gemnoc);
196 DEFINE_QBCM(bcm_sn12, "SN12", false, &qns_pcie_modem_mem_noc, &qns_pcie_mem_noc);