143 		writew(0, i2c_dev->base + REG_CDR);  in wmt_i2c_write()
145 		writew(pmsg->buf[0] & 0xFF, i2c_dev->base + REG_CDR);  in wmt_i2c_write()
151 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_write()
155 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_write()
167 	writew(tcr_val, i2c_dev->base + REG_TCR);  in wmt_i2c_write()
172 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_write()
196 			writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_write()
202 				writew(CR_ENABLE, i2c_dev->base + REG_CR);  in wmt_i2c_write()
204 			writew(pmsg->buf[xfer_len] & 0xFF, i2c_dev->base +  in wmt_i2c_write()
206 			writew(CR_CPU_RDY | CR_ENABLE, i2c_dev->base + REG_CR);  in wmt_i2c_write()
230 	writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
234 	writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
239 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
245 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
257 	writew(tcr_val, i2c_dev->base + REG_TCR);  in wmt_i2c_read()
262 		writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
282 			writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
286 			writew(val, i2c_dev->base + REG_CR);  in wmt_i2c_read()
330 	writew(i2c_dev->cmd_status, i2c_dev->base + REG_ISR);  in wmt_i2c_isr()
354 	writew(0, i2c_dev->base + REG_CR);  in wmt_i2c_reset_hardware()
355 	writew(MCR_APB_166M, i2c_dev->base + REG_MCR);  in wmt_i2c_reset_hardware()
356 	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);  in wmt_i2c_reset_hardware()
357 	writew(IMR_ENABLE_ALL, i2c_dev->base + REG_IMR);  in wmt_i2c_reset_hardware()
358 	writew(CR_ENABLE, i2c_dev->base + REG_CR);  in wmt_i2c_reset_hardware()
360 	writew(ISR_WRITE_ALL, i2c_dev->base + REG_ISR);  in wmt_i2c_reset_hardware()
363 		writew(SCL_TIMEOUT(128) | TR_STD, i2c_dev->base + REG_TR);  in wmt_i2c_reset_hardware()
365 		writew(SCL_TIMEOUT(128) | TR_HS, i2c_dev->base + REG_TR);  in wmt_i2c_reset_hardware()
444 	writew(0, i2c_dev->base + REG_IMR);  in wmt_i2c_remove()