113 	tilcdc_write_mask(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_load_palette()
119 		tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA);  in tilcdc_crtc_load_palette()
125 	tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_load_palette()
133 	tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_load_palette()
135 		tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_PL_INT_ENA);  in tilcdc_crtc_load_palette()
147 		tilcdc_set(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_enable_irqs()
163 		tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_disable_irqs()
372 	reg = tilcdc_read(dev, LCDC_RASTER_CTRL_REG) &  in tilcdc_crtc_set_mode()
398 	tilcdc_write(dev, LCDC_RASTER_CTRL_REG, reg);  in tilcdc_crtc_set_mode()
426 		tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER);  in tilcdc_crtc_set_mode()
428 		tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ORDER);  in tilcdc_crtc_set_mode()
463 	tilcdc_write_mask(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_enable()
475 	tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_enable()
504 	tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_off()
740 	if (tilcdc_read(dev, LCDC_RASTER_CTRL_REG) & LCDC_RASTER_ENABLE) {  in tilcdc_crtc_reset()
746 		tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, LCDC_RASTER_ENABLE);  in tilcdc_crtc_reset()
962 			tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_irq()
974 			reg = tilcdc_read(dev, LCDC_RASTER_CTRL_REG);  in tilcdc_crtc_irq()
976 				tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_irq()
978 				tilcdc_set(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_irq()
1001 			tilcdc_clear(dev, LCDC_RASTER_CTRL_REG,  in tilcdc_crtc_irq()