Lines Matching refs:mpll_func_cntl
123 u32 mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl; in rv730_populate_mclk_value() local
147 mpll_func_cntl |= MPLL_DIVEN; in rv730_populate_mclk_value()
149 mpll_func_cntl &= ~MPLL_DIVEN; in rv730_populate_mclk_value()
151 mpll_func_cntl &= ~(MPLL_REF_DIV_MASK | MPLL_HILEN_MASK | MPLL_LOLEN_MASK); in rv730_populate_mclk_value()
152 mpll_func_cntl |= MPLL_REF_DIV(dividers.ref_div); in rv730_populate_mclk_value()
153 mpll_func_cntl |= MPLL_HILEN((dividers.post_div >> 4) & 0xf); in rv730_populate_mclk_value()
154 mpll_func_cntl |= MPLL_LOLEN(dividers.post_div & 0xf); in rv730_populate_mclk_value()
186 mclk->mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_mclk_value()
214 pi->clk_regs.rv730.mpll_func_cntl = in rv730_read_clock_registers()
230 u32 mpll_func_cntl = 0; in rv730_populate_smc_acpi_state() local
255 mpll_func_cntl = pi->clk_regs.rv730.mpll_func_cntl; in rv730_populate_smc_acpi_state()
259 mpll_func_cntl |= MPLL_RESET | MPLL_BYPASS_EN; in rv730_populate_smc_acpi_state()
260 mpll_func_cntl &= ~MPLL_SLEEP; in rv730_populate_smc_acpi_state()
294 table->ACPIState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL = cpu_to_be32(mpll_func_cntl); in rv730_populate_smc_acpi_state()
325 cpu_to_be32(pi->clk_regs.rv730.mpll_func_cntl); in rv730_populate_smc_initial_state()