745 	s64 kt, kv, leakage_w, i_leakage, vddc, temperature;  in ni_calculate_leakage_for_v_and_t_formula()  local
748 	vddc = div64_s64(drm_int2fixp(v), 1000);  in ni_calculate_leakage_for_v_and_t_formula()
754 			  drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 1000), vddc)));  in ni_calculate_leakage_for_v_and_t_formula()
756 	leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc);  in ni_calculate_leakage_for_v_and_t_formula()
812 			if (ps->performance_levels[i].vddc > max_limits->vddc)  in ni_apply_state_adjust_rules()
813 				ps->performance_levels[i].vddc = max_limits->vddc;  in ni_apply_state_adjust_rules()
836 		if (ps->performance_levels[i].vddc < ps->performance_levels[i - 1].vddc)  in ni_apply_state_adjust_rules()
837 			ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc;  in ni_apply_state_adjust_rules()
875 						   max_limits->vddc,  &ps->performance_levels[i].vddc);  in ni_apply_state_adjust_rules()
881 						   max_limits->vddc,  &ps->performance_levels[i].vddc);  in ni_apply_state_adjust_rules()
884 						   max_limits->vddc,  &ps->performance_levels[i].vddc);  in ni_apply_state_adjust_rules()
889 					      max_limits->vddc, max_limits->vddci,  in ni_apply_state_adjust_rules()
890 					      &ps->performance_levels[i].vddc,  in ni_apply_state_adjust_rules()
896 		if (ps->performance_levels[i].vddc > rdev->pm.dpm.dyn_state.max_clock_voltage_on_dc.vddc)  in ni_apply_state_adjust_rules()
899 		if (ps->performance_levels[i].vddc < rdev->pm.dpm.dyn_state.min_vddc_for_pcie_gen2)  in ni_apply_state_adjust_rules()
1348 		*std_voltage = rdev->pm.dpm.dyn_state.cac_leakage_table.entries[voltage->index].vddc;  in ni_get_std_voltage_value()
1392 		NISLANDS_SMC_VOLTAGE_VALUE vddc;  in ni_calculate_power_boost_limit()  local
1401 						state->performance_levels[state->performance_level_count - 2].vddc,  in ni_calculate_power_boost_limit()
1402 						&vddc);  in ni_calculate_power_boost_limit()
1406 		ret = ni_get_std_voltage_value(rdev, &vddc, &std_vddc_med);  in ni_calculate_power_boost_limit()
1411 						state->performance_levels[state->performance_level_count - 1].vddc,  in ni_calculate_power_boost_limit()
1412 						&vddc);  in ni_calculate_power_boost_limit()
1416 		ret = ni_get_std_voltage_value(rdev, &vddc, &std_vddc_high);  in ni_calculate_power_boost_limit()
1729 					initial_state->performance_levels[0].vddc,  in ni_populate_smc_initial_state()
1730 					&table->initialState.level.vddc);  in ni_populate_smc_initial_state()
1735 					       &table->initialState.level.vddc,  in ni_populate_smc_initial_state()
1739 						      table->initialState.level.vddc.index,  in ni_populate_smc_initial_state()
1816 						pi->acpi_vddc, &table->ACPIState.level.vddc);  in ni_populate_smc_acpi_state()
1821 						       &table->ACPIState.level.vddc, &std_vddc);  in ni_populate_smc_acpi_state()
1824 							      table->ACPIState.level.vddc.index,  in ni_populate_smc_acpi_state()
1840 						&table->ACPIState.level.vddc);  in ni_populate_smc_acpi_state()
1845 						       &table->ACPIState.level.vddc,  in ni_populate_smc_acpi_state()
1849 							      table->ACPIState.level.vddc.index,  in ni_populate_smc_acpi_state()
2367 					pl->vddc, &level->vddc);  in ni_convert_power_level_to_smc()
2371 	ret = ni_get_std_voltage_value(rdev, &level->vddc, &std_vddc);  in ni_convert_power_level_to_smc()
2376 				      level->vddc.index, &level->std_vddc);  in ni_convert_power_level_to_smc()
3935 	pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC);  in ni_parse_pplib_clock_info()
3940 	if (pl->vddc == 0xff01) {  in ni_parse_pplib_clock_info()
3942 			pl->vddc = pi->max_vddc;  in ni_parse_pplib_clock_info()
3946 		pi->acpi_vddc = pl->vddc;  in ni_parse_pplib_clock_info()
3959 	if (pi->min_vddc_in_table > pl->vddc)  in ni_parse_pplib_clock_info()
3960 		pi->min_vddc_in_table = pl->vddc;  in ni_parse_pplib_clock_info()
3962 	if (pi->max_vddc_in_table < pl->vddc)  in ni_parse_pplib_clock_info()
3963 		pi->max_vddc_in_table = pl->vddc;  in ni_parse_pplib_clock_info()
3967 		u16 vddc, vddci, mvdd;  in ni_parse_pplib_clock_info()  local
3968 		radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd);  in ni_parse_pplib_clock_info()
3971 		pl->vddc = vddc;  in ni_parse_pplib_clock_info()
3979 		rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;  in ni_parse_pplib_clock_info()
4295 			       i, pl->sclk, pl->mclk, pl->vddc, pl->vddci, pl->pcie_gen + 1);  in ni_dpm_print_power_state()
4298 			       i, pl->sclk, pl->mclk, pl->vddc, pl->vddci);  in ni_dpm_print_power_state()
4320 			   current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);  in ni_dpm_debugfs_print_current_performance_level()