Lines Matching refs:FLD_MOD

406 		l = FLD_MOD(l, 1, 0, 0);		/* PLL_STOPMODE */  in dss_pll_write_config_type_a()
407 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
408 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
410 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
413 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
419 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
422 l = FLD_MOD(l, cinfo->mX[3] ? cinfo->mX[3] - 1 : 0, in dss_pll_write_config_type_a()
434 l = FLD_MOD(l, f, 4, 1); /* PLL_FREQSEL */ in dss_pll_write_config_type_a()
438 l = FLD_MOD(l, f, 3, 1); /* PLL_SELFREQDCO */ in dss_pll_write_config_type_a()
440 l = FLD_MOD(l, 1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_a()
441 l = FLD_MOD(l, 0, 14, 14); /* PHY_CLKINEN */ in dss_pll_write_config_type_a()
442 l = FLD_MOD(l, 0, 16, 16); /* M4_CLOCK_EN */ in dss_pll_write_config_type_a()
443 l = FLD_MOD(l, 0, 18, 18); /* M5_CLOCK_EN */ in dss_pll_write_config_type_a()
444 l = FLD_MOD(l, 1, 20, 20); /* HSDIVBYPASS */ in dss_pll_write_config_type_a()
446 l = FLD_MOD(l, 3, 22, 21); /* REFSEL = sysclk */ in dss_pll_write_config_type_a()
447 l = FLD_MOD(l, 0, 23, 23); /* M6_CLOCK_EN */ in dss_pll_write_config_type_a()
448 l = FLD_MOD(l, 0, 25, 25); /* M7_CLOCK_EN */ in dss_pll_write_config_type_a()
502 l = FLD_MOD(l, 1, 14, 14); /* PHY_CLKINEN */ in dss_pll_write_config_type_a()
503 l = FLD_MOD(l, cinfo->mX[0] ? 1 : 0, 16, 16); /* M4_CLOCK_EN */ in dss_pll_write_config_type_a()
504 l = FLD_MOD(l, cinfo->mX[1] ? 1 : 0, 18, 18); /* M5_CLOCK_EN */ in dss_pll_write_config_type_a()
505 l = FLD_MOD(l, 0, 20, 20); /* HSDIVBYPASS */ in dss_pll_write_config_type_a()
506 l = FLD_MOD(l, cinfo->mX[2] ? 1 : 0, 23, 23); /* M6_CLOCK_EN */ in dss_pll_write_config_type_a()
507 l = FLD_MOD(l, cinfo->mX[3] ? 1 : 0, 25, 25); /* M7_CLOCK_EN */ in dss_pll_write_config_type_a()
532 l = FLD_MOD(l, cinfo->m, 20, 9); /* PLL_REGM */ in dss_pll_write_config_type_b()
533 l = FLD_MOD(l, cinfo->n - 1, 8, 1); /* PLL_REGN */ in dss_pll_write_config_type_b()
537 l = FLD_MOD(l, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */ in dss_pll_write_config_type_b()
538 l = FLD_MOD(l, 0x1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_b()
539 l = FLD_MOD(l, 0x0, 14, 14); /* PHY_CLKINEN */ in dss_pll_write_config_type_b()
541 l = FLD_MOD(l, 0x3, 22, 21); /* REFSEL = SYSCLK */ in dss_pll_write_config_type_b()
545 l = FLD_MOD(l, 0x4, 3, 1); in dss_pll_write_config_type_b()
547 l = FLD_MOD(l, 0x2, 3, 1); in dss_pll_write_config_type_b()
551 l = FLD_MOD(l, cinfo->sd, 17, 10); /* PLL_REGSD */ in dss_pll_write_config_type_b()
555 l = FLD_MOD(l, cinfo->mX[0], 24, 18); /* PLL_REGM2 */ in dss_pll_write_config_type_b()
556 l = FLD_MOD(l, cinfo->mf, 17, 0); /* PLL_REGM_F */ in dss_pll_write_config_type_b()