302 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x333d3282);  in meson_hdmi_phy_setup_mode()
303 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2136315b);  in meson_hdmi_phy_setup_mode()
306 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303382);  in meson_hdmi_phy_setup_mode()
307 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2036315b);  in meson_hdmi_phy_setup_mode()
310 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33303362);  in meson_hdmi_phy_setup_mode()
311 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2016315b);  in meson_hdmi_phy_setup_mode()
314 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33604142);  in meson_hdmi_phy_setup_mode()
315 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x0016315b);  in meson_hdmi_phy_setup_mode()
321 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33353245);  in meson_hdmi_phy_setup_mode()
322 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2100115b);  in meson_hdmi_phy_setup_mode()
325 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33634283);  in meson_hdmi_phy_setup_mode()
326 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0xb000115b);  in meson_hdmi_phy_setup_mode()
329 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33632122);  in meson_hdmi_phy_setup_mode()
330 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2000115b);  in meson_hdmi_phy_setup_mode()
336 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x37eb65c4);  in meson_hdmi_phy_setup_mode()
337 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b);  in meson_hdmi_phy_setup_mode()
338 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL5, 0x0000080b);  in meson_hdmi_phy_setup_mode()
341 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33eb6262);  in meson_hdmi_phy_setup_mode()
342 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b);  in meson_hdmi_phy_setup_mode()
343 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL5, 0x00000003);  in meson_hdmi_phy_setup_mode()
346 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0x33eb4242);  in meson_hdmi_phy_setup_mode()
347 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL3, 0x2ab0ff3b);  in meson_hdmi_phy_setup_mode()
348 			regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL5, 0x00000003);  in meson_hdmi_phy_setup_mode()
358 	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xf);  in meson_dw_hdmi_phy_reset()
363 	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0xe);  in meson_dw_hdmi_phy_reset()
388 	regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);  in dw_hdmi_phy_init()
391 	regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);  in dw_hdmi_phy_init()
429 	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,  in dw_hdmi_phy_init()
436 		regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,  in dw_hdmi_phy_init()
439 		regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1,  in dw_hdmi_phy_init()
443 	regmap_update_bits(priv->hhi, HHI_HDMI_PHY_CNTL1, 0xf, 0);  in dw_hdmi_phy_init()
495 	regmap_write(priv->hhi, HHI_HDMI_PHY_CNTL0, 0);  in dw_hdmi_phy_disable()
632 	regmap_update_bits(priv->hhi, HHI_HDMI_CLK_CNTL, 0xffff, 0x100);  in meson_dw_hdmi_init()
635 	regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0);  in meson_dw_hdmi_init()