124 	unsigned int	(*top_read)(struct meson_dw_hdmi *dw_hdmi,
126 	void		(*top_write)(struct meson_dw_hdmi *dw_hdmi,
128 	unsigned int	(*dwc_read)(struct meson_dw_hdmi *dw_hdmi,
130 	void		(*dwc_write)(struct meson_dw_hdmi *dw_hdmi,
145 	struct dw_hdmi *hdmi;
149 static inline int dw_hdmi_is_compatible(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_is_compatible()  argument
152 	return of_device_is_compatible(dw_hdmi->dev->of_node, compat);  in dw_hdmi_is_compatible()
157 static unsigned int dw_hdmi_top_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_top_read()  argument
166 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_read()
167 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_read()
170 	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);  in dw_hdmi_top_read()
171 	data = readl(dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);  in dw_hdmi_top_read()
178 static unsigned int dw_hdmi_g12a_top_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_top_read()  argument
181 	return readl(dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));  in dw_hdmi_g12a_top_read()
184 static inline void dw_hdmi_top_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_top_write()  argument
192 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_write()
193 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_TOP_ADDR_REG);  in dw_hdmi_top_write()
196 	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_DATA_REG);  in dw_hdmi_top_write()
201 static inline void dw_hdmi_g12a_top_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_top_write()  argument
204 	writel(data, dw_hdmi->hdmitx + HDMITX_TOP_G12A_OFFSET + (addr << 2));  in dw_hdmi_g12a_top_write()
208 static inline void dw_hdmi_top_write_bits(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_top_write_bits()  argument
213 	unsigned int data = dw_hdmi->data->top_read(dw_hdmi, addr);  in dw_hdmi_top_write_bits()
218 	dw_hdmi->data->top_write(dw_hdmi, addr, data);  in dw_hdmi_top_write_bits()
221 static unsigned int dw_hdmi_dwc_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_dwc_read()  argument
230 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_read()
231 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_read()
234 	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);  in dw_hdmi_dwc_read()
235 	data = readl(dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);  in dw_hdmi_dwc_read()
242 static unsigned int dw_hdmi_g12a_dwc_read(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_dwc_read()  argument
245 	return readb(dw_hdmi->hdmitx + addr);  in dw_hdmi_g12a_dwc_read()
248 static inline void dw_hdmi_dwc_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_dwc_write()  argument
256 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_write()
257 	writel(addr & 0xffff, dw_hdmi->hdmitx + HDMITX_DWC_ADDR_REG);  in dw_hdmi_dwc_write()
260 	writel(data, dw_hdmi->hdmitx + HDMITX_DWC_DATA_REG);  in dw_hdmi_dwc_write()
265 static inline void dw_hdmi_g12a_dwc_write(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_g12a_dwc_write()  argument
268 	writeb(data, dw_hdmi->hdmitx + addr);  in dw_hdmi_g12a_dwc_write()
272 static inline void dw_hdmi_dwc_write_bits(struct meson_dw_hdmi *dw_hdmi,  in dw_hdmi_dwc_write_bits()  argument
277 	unsigned int data = dw_hdmi->data->dwc_read(dw_hdmi, addr);  in dw_hdmi_dwc_write_bits()
282 	dw_hdmi->data->dwc_write(dw_hdmi, addr, data);  in dw_hdmi_dwc_write_bits()
288 static void meson_hdmi_phy_setup_mode(struct meson_dw_hdmi *dw_hdmi,  in meson_hdmi_phy_setup_mode()  argument
292 	struct meson_drm *priv = dw_hdmi->priv;  in meson_hdmi_phy_setup_mode()
298 	if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") ||  in meson_hdmi_phy_setup_mode()
299 	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi")) {  in meson_hdmi_phy_setup_mode()
317 	} else if (dw_hdmi_is_compatible(dw_hdmi,  in meson_hdmi_phy_setup_mode()
332 	} else if (dw_hdmi_is_compatible(dw_hdmi,  in meson_hdmi_phy_setup_mode()
353 static inline void meson_dw_hdmi_phy_reset(struct meson_dw_hdmi *dw_hdmi)  in meson_dw_hdmi_phy_reset()  argument
355 	struct meson_drm *priv = dw_hdmi->priv;  in meson_dw_hdmi_phy_reset()
368 static int dw_hdmi_phy_init(struct dw_hdmi *hdmi, void *data,  in dw_hdmi_phy_init()
372 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_phy_init()  local
374 	struct meson_drm *priv = dw_hdmi->priv;  in dw_hdmi_phy_init()
394 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_SW_RESET,  0);  in dw_hdmi_phy_init()
397 	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL,  in dw_hdmi_phy_init()
401 	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_CLK_CNTL,  in dw_hdmi_phy_init()
405 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_BIST_CNTL, BIT(12));  in dw_hdmi_phy_init()
409 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,  in dw_hdmi_phy_init()
411 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,  in dw_hdmi_phy_init()
414 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_01,  in dw_hdmi_phy_init()
416 		dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_23,  in dw_hdmi_phy_init()
421 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x1);  in dw_hdmi_phy_init()
423 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_TMDS_CLK_PTTN_CNTL, 0x2);  in dw_hdmi_phy_init()
426 	meson_hdmi_phy_setup_mode(dw_hdmi, mode, mode_is_420);  in dw_hdmi_phy_init()
433 	if (dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxl-dw-hdmi") ||  in dw_hdmi_phy_init()
434 	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-gxm-dw-hdmi") ||  in dw_hdmi_phy_init()
435 	    dw_hdmi_is_compatible(dw_hdmi, "amlogic,meson-g12a-dw-hdmi"))  in dw_hdmi_phy_init()
450 	meson_dw_hdmi_phy_reset(dw_hdmi);  in dw_hdmi_phy_init()
451 	meson_dw_hdmi_phy_reset(dw_hdmi);  in dw_hdmi_phy_init()
452 	meson_dw_hdmi_phy_reset(dw_hdmi);  in dw_hdmi_phy_init()
487 static void dw_hdmi_phy_disable(struct dw_hdmi *hdmi,  in dw_hdmi_phy_disable()
490 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_phy_disable()  local
491 	struct meson_drm *priv = dw_hdmi->priv;  in dw_hdmi_phy_disable()
498 static enum drm_connector_status dw_hdmi_read_hpd(struct dw_hdmi *hdmi,  in dw_hdmi_read_hpd()
501 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_read_hpd()  local
503 	return !!dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_STAT0) ?  in dw_hdmi_read_hpd()
507 static void dw_hdmi_setup_hpd(struct dw_hdmi *hdmi,  in dw_hdmi_setup_hpd()
510 	struct meson_dw_hdmi *dw_hdmi = (struct meson_dw_hdmi *)data;  in dw_hdmi_setup_hpd()  local
513 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_HPD_FILTER,  in dw_hdmi_setup_hpd()
517 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR,  in dw_hdmi_setup_hpd()
521 	dw_hdmi_top_write_bits(dw_hdmi, HDMITX_TOP_INTR_MASKN,  in dw_hdmi_setup_hpd()
535 	struct meson_dw_hdmi *dw_hdmi = dev_id;  in dw_hdmi_top_irq()  local
538 	stat = dw_hdmi->data->top_read(dw_hdmi, HDMITX_TOP_INTR_STAT);  in dw_hdmi_top_irq()
539 	dw_hdmi->data->top_write(dw_hdmi, HDMITX_TOP_INTR_STAT_CLR, stat);  in dw_hdmi_top_irq()
543 		dw_hdmi->irq_stat = stat;  in dw_hdmi_top_irq()
559 	struct meson_dw_hdmi *dw_hdmi = dev_id;  in dw_hdmi_top_thread_irq()  local
560 	u32 stat = dw_hdmi->irq_stat;  in dw_hdmi_top_thread_irq()
569 		dw_hdmi_setup_rx_sense(dw_hdmi->hdmi, hpd_connected,  in dw_hdmi_top_thread_irq()
572 		drm_helper_hpd_irq_event(dw_hdmi->bridge->dev);  in dw_hdmi_top_thread_irq()
573 		drm_bridge_hpd_notify(dw_hdmi->bridge,  in dw_hdmi_top_thread_irq()
586 	struct meson_dw_hdmi *dw_hdmi = context;  in meson_dw_hdmi_reg_read()  local
588 	*result = dw_hdmi->data->dwc_read(dw_hdmi, reg);  in meson_dw_hdmi_reg_read()
597 	struct meson_dw_hdmi *dw_hdmi = context;  in meson_dw_hdmi_reg_write()  local
599 	dw_hdmi->data->dwc_write(dw_hdmi, reg, val);  in meson_dw_hdmi_reg_write()