Lines Matching refs:vlv

474 		dev_priv->wm.vlv.cxsr = enable;  in intel_set_memory_cxsr()
505 struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; in vlv_get_fifo_size()
1713 &crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2]; in vlv_compute_fifo()
1714 struct vlv_fifo_state *fifo_state = &crtc_state->wm.vlv.fifo_state; in vlv_compute_fifo()
1828 struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level]; in vlv_raw_plane_wm_set()
1853 struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level]; in vlv_raw_plane_wm_compute()
1872 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM2].plane[plane_id], in vlv_raw_plane_wm_compute()
1873 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_PM5].plane[plane_id], in vlv_raw_plane_wm_compute()
1874 crtc_state->wm.vlv.raw[VLV_WM_LEVEL_DDR_DVFS].plane[plane_id]); in vlv_raw_plane_wm_compute()
1883 &crtc_state->wm.vlv.raw[level]; in vlv_raw_plane_wm_is_valid()
1885 &crtc_state->wm.vlv.fifo_state; in vlv_raw_plane_wm_is_valid()
1904 struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal; in vlv_compute_pipe_wm()
1906 &crtc_state->wm.vlv.fifo_state; in vlv_compute_pipe_wm()
1945 &old_crtc_state->wm.vlv.fifo_state; in vlv_compute_pipe_wm()
1967 const struct g4x_pipe_wm *raw = &crtc_state->wm.vlv.raw[level]; in vlv_compute_pipe_wm()
2013 &crtc_state->wm.vlv.fifo_state; in vlv_atomic_update_fifo()
2110 struct vlv_wm_state *intermediate = &new_crtc_state->wm.vlv.intermediate; in vlv_compute_intermediate_wm()
2111 const struct vlv_wm_state *optimal = &new_crtc_state->wm.vlv.optimal; in vlv_compute_intermediate_wm()
2112 const struct vlv_wm_state *active = &old_crtc_state->wm.vlv.optimal; in vlv_compute_intermediate_wm()
2165 const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv; in vlv_merge_wm()
2184 const struct vlv_wm_state *wm_state = &crtc->wm.active.vlv; in vlv_merge_wm()
2200 struct vlv_wm_values *old_wm = &dev_priv->wm.vlv; in vlv_program_watermarks()
2239 crtc->wm.active.vlv = crtc_state->wm.vlv.intermediate; in vlv_initial_watermarks()
2255 crtc->wm.active.vlv = crtc_state->wm.vlv.optimal; in vlv_optimize_watermarks()
6981 struct vlv_wm_values *wm = &dev_priv->wm.vlv; in vlv_wm_get_hw_state()
7028 struct vlv_wm_state *active = &crtc->wm.active.vlv; in vlv_wm_get_hw_state()
7030 &crtc_state->wm.vlv.fifo_state; in vlv_wm_get_hw_state()
7042 &crtc_state->wm.vlv.raw[level]; in vlv_wm_get_hw_state()
7062 crtc_state->wm.vlv.optimal = *active; in vlv_wm_get_hw_state()
7063 crtc_state->wm.vlv.intermediate = *active; in vlv_wm_get_hw_state()
7093 struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal; in vlv_wm_sanitize()
7095 &crtc_state->wm.vlv.fifo_state; in vlv_wm_sanitize()
7104 &crtc_state->wm.vlv.raw[level]; in vlv_wm_sanitize()
7118 crtc_state->wm.vlv.intermediate = in vlv_wm_sanitize()
7119 crtc_state->wm.vlv.optimal; in vlv_wm_sanitize()
7120 crtc->wm.active.vlv = crtc_state->wm.vlv.optimal; in vlv_wm_sanitize()
7967 CG_FUNCS(vlv);