Lines Matching refs:indirect_ctx

414 	if (!wa_ctx->indirect_ctx.obj)  in release_shadow_wa_ctx()
417 i915_gem_object_lock(wa_ctx->indirect_ctx.obj, NULL); in release_shadow_wa_ctx()
418 i915_gem_object_unpin_map(wa_ctx->indirect_ctx.obj); in release_shadow_wa_ctx()
419 i915_gem_object_unlock(wa_ctx->indirect_ctx.obj); in release_shadow_wa_ctx()
420 i915_gem_object_put(wa_ctx->indirect_ctx.obj); in release_shadow_wa_ctx()
422 wa_ctx->indirect_ctx.obj = NULL; in release_shadow_wa_ctx()
423 wa_ctx->indirect_ctx.shadow_va = NULL; in release_shadow_wa_ctx()
506 workload->wa_ctx.indirect_ctx.size) { in intel_gvt_scan_and_shadow_workload()
604 (~INDIRECT_CTX_ADDR_MASK)) | wa_ctx->indirect_ctx.shadow_gma; in update_wa_ctx_2_shadow_ctx()
611 (unsigned char *)wa_ctx->indirect_ctx.shadow_va + in prepare_shadow_wa_ctx()
612 wa_ctx->indirect_ctx.size; in prepare_shadow_wa_ctx()
616 if (wa_ctx->indirect_ctx.size == 0) in prepare_shadow_wa_ctx()
621 i915_gem_object_lock(wa_ctx->indirect_ctx.obj, &ww); in prepare_shadow_wa_ctx()
623 vma = i915_gem_object_ggtt_pin_ww(wa_ctx->indirect_ctx.obj, &ww, NULL, in prepare_shadow_wa_ctx()
642 wa_ctx->indirect_ctx.shadow_gma = i915_ggtt_offset(vma); in prepare_shadow_wa_ctx()
1635 u32 head, tail, start, ctl, ctx_ctl, per_ctx, indirect_ctx; in intel_vgpu_create_workload() local
1706 RING_CTX_OFF(rcs_indirect_ctx.val), &indirect_ctx, 4); in intel_vgpu_create_workload()
1708 workload->wa_ctx.indirect_ctx.guest_gma = in intel_vgpu_create_workload()
1709 indirect_ctx & INDIRECT_CTX_ADDR_MASK; in intel_vgpu_create_workload()
1710 workload->wa_ctx.indirect_ctx.size = in intel_vgpu_create_workload()
1711 (indirect_ctx & INDIRECT_CTX_SIZE_MASK) * in intel_vgpu_create_workload()
1714 if (workload->wa_ctx.indirect_ctx.size != 0) { in intel_vgpu_create_workload()
1716 workload->wa_ctx.indirect_ctx.guest_gma, in intel_vgpu_create_workload()
1717 workload->wa_ctx.indirect_ctx.size)) { in intel_vgpu_create_workload()
1719 workload->wa_ctx.indirect_ctx.guest_gma); in intel_vgpu_create_workload()