Lines Matching refs:i915_mmio_reg_offset

161 	((offset - i915_mmio_reg_offset(FENCE_REG_GEN6_LO(0))) >> 3)
164 	(num * 8 + i915_mmio_reg_offset(FENCE_REG_GEN6_LO(0)))
778 	    reg_nonpriv != i915_mmio_reg_offset(RING_NOPID(engine->mmio_base))) {  in force_nonpriv_write()
796 		if (offset == i915_mmio_reg_offset(DDI_BUF_CTL(PORT_E)))  in ddi_buf_ctl_mmio_write()
878 		end = i915_mmio_reg_offset(i915_end);  in calc_index()
1073 	if (reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_A)))  in trigger_aux_channel_interrupt()
1076 		 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_B)))  in trigger_aux_channel_interrupt()
1079 		 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_C)))  in trigger_aux_channel_interrupt()
1082 		 reg == i915_mmio_reg_offset(DP_AUX_CH_CTL(AUX_CH_D)))  in trigger_aux_channel_interrupt()
1953 	    offset == i915_mmio_reg_offset(RING_TIMESTAMP(engine->mmio_base)) ||  in mmio_read_from_hw()
1954 	    offset == i915_mmio_reg_offset(RING_TIMESTAMP_UDW(engine->mmio_base))) {  in mmio_read_from_hw()
2131 	ret = setup_mmio_info(gvt, i915_mmio_reg_offset(reg), \
2799 		if (offset >= i915_mmio_reg_offset(block->offset) &&  in find_mmio_block()
2800 		    offset < i915_mmio_reg_offset(block->offset) + block->size)  in find_mmio_block()
2901 	if (size < 1024 || offset == i915_mmio_reg_offset(GEN9_GFX_MOCS(0)))  in handle_mmio_cb()
2925 		     i915_mmio_reg_offset(gvt->mmio.mmio_block->offset));  in init_mmio_block_handlers()
3025 		if (i915_mmio_reg_offset(block->offset) == VGT_PVINFO_PAGE)  in intel_gvt_for_each_tracked_mmio()
3029 			ret = handler(gvt, i915_mmio_reg_offset(block->offset) + j, data);  in intel_gvt_for_each_tracked_mmio()