Lines Matching refs:_MMIO
51 #define PCH_PP_STATUS _MMIO(0xc7200)
52 #define PCH_PP_CONTROL _MMIO(0xc7204)
53 #define PCH_PP_ON_DELAYS _MMIO(0xc7208)
54 #define PCH_PP_OFF_DELAYS _MMIO(0xc720c)
55 #define PCH_PP_DIVISOR _MMIO(0xc7210)
712 _MMIO(0xd80),
719 _MMIO(0x2690),
720 _MMIO(0x2694),
721 _MMIO(0x2698),
722 _MMIO(0x2754),
723 _MMIO(0x28a0),
724 _MMIO(0x4de0),
725 _MMIO(0x4de4),
726 _MMIO(0x4dfc),
728 _MMIO(0x7014),
731 _MMIO(0x7700),
732 _MMIO(0x7704),
733 _MMIO(0x7708),
734 _MMIO(0x770c),
735 _MMIO(0x83a8),
736 _MMIO(0xb110),
738 _MMIO(0xe100),
739 _MMIO(0xe18c),
740 _MMIO(0xe48c),
741 _MMIO(0xe5f4),
742 _MMIO(0x64844),
1957 intel_uncore_read(gvt->gt->uncore, _MMIO(offset)); in mmio_read_from_hw()
2195 #define RING_REG(base) _MMIO((base) + 0x28) in init_generic_mmio_info()
2199 #define RING_REG(base) _MMIO((base) + 0x134) in init_generic_mmio_info()
2203 #define RING_REG(base) _MMIO((base) + 0x6c) in init_generic_mmio_info()
2208 MMIO_GM_RDR(_MMIO(0x2148), D_ALL, NULL, NULL); in init_generic_mmio_info()
2210 MMIO_GM_RDR(_MMIO(0x12198), D_ALL, NULL, NULL); in init_generic_mmio_info()
2219 #define RING_REG(base) _MMIO((base) + 0x29c) in init_generic_mmio_info()
2239 MMIO_DFH(_MMIO(0x2124), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2241 MMIO_DFH(_MMIO(0x20dc), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2243 MMIO_DFH(_MMIO(0x2088), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2246 MMIO_DFH(_MMIO(0x2470), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2252 MMIO_DFH(_MMIO(0x9030), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2253 MMIO_DFH(_MMIO(0x20a0), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2254 MMIO_DFH(_MMIO(0x2420), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2255 MMIO_DFH(_MMIO(0x2430), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2256 MMIO_DFH(_MMIO(0x2434), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2257 MMIO_DFH(_MMIO(0x2438), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2258 MMIO_DFH(_MMIO(0x243c), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2259 MMIO_DFH(_MMIO(0x7018), D_ALL, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2291 MMIO_F(_MMIO(_PCH_DPB_AUX_CH_CTL), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL, in init_generic_mmio_info()
2293 MMIO_F(_MMIO(_PCH_DPC_AUX_CH_CTL), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL, in init_generic_mmio_info()
2295 MMIO_F(_MMIO(_PCH_DPD_AUX_CH_CTL), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL, in init_generic_mmio_info()
2300 MMIO_DH(_MMIO(_PCH_TRANSACONF), D_ALL, NULL, transconf_mmio_write); in init_generic_mmio_info()
2301 MMIO_DH(_MMIO(_PCH_TRANSBCONF), D_ALL, NULL, transconf_mmio_write); in init_generic_mmio_info()
2313 MMIO_DH(_MMIO(0xe651c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2314 MMIO_DH(_MMIO(0xe661c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2315 MMIO_DH(_MMIO(0xe671c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2316 MMIO_DH(_MMIO(0xe681c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2317 MMIO_DH(_MMIO(0xe6c04), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2318 MMIO_DH(_MMIO(0xe6e1c), D_ALL, dpy_reg_mmio_read, NULL); in init_generic_mmio_info()
2333 MMIO_F(_MMIO(_DPA_AUX_CH_CTL), 6 * 4, 0, 0, 0, D_ALL, NULL, in init_generic_mmio_info()
2354 MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_A), D_ALL, NULL, NULL); in init_generic_mmio_info()
2355 MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_B), D_ALL, NULL, NULL); in init_generic_mmio_info()
2356 MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_C), D_ALL, NULL, NULL); in init_generic_mmio_info()
2357 MMIO_DH(_MMIO(_TRANS_DDI_FUNC_CTL_EDP), D_ALL, NULL, NULL); in init_generic_mmio_info()
2384 MMIO_DFH(_MMIO(0x215c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2385 MMIO_DFH(_MMIO(0x2178), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2386 MMIO_DFH(_MMIO(0x217c), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2387 MMIO_DFH(_MMIO(0x12178), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2388 MMIO_DFH(_MMIO(0x1217c), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2390 MMIO_F(_MMIO(0x2290), 8, F_CMD_ACCESS, 0, 0, D_BDW_PLUS, NULL, NULL); in init_generic_mmio_info()
2391 MMIO_F(_MMIO(0x5200), 32, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL); in init_generic_mmio_info()
2392 MMIO_F(_MMIO(0x5240), 32, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL); in init_generic_mmio_info()
2393 MMIO_F(_MMIO(0x5280), 16, F_CMD_ACCESS, 0, 0, D_ALL, NULL, NULL); in init_generic_mmio_info()
2395 MMIO_DFH(_MMIO(0x1c17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2396 MMIO_DFH(_MMIO(0x1c178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2410 MMIO_DH(_MMIO(0x4260), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2411 MMIO_DH(_MMIO(0x4264), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2412 MMIO_DH(_MMIO(0x4268), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2413 MMIO_DH(_MMIO(0x426c), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2414 MMIO_DH(_MMIO(0x4270), D_BDW_PLUS, NULL, gvt_reg_tlb_control_handler); in init_generic_mmio_info()
2415 MMIO_DFH(_MMIO(0x4094), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2419 MMIO_DFH(_MMIO(0x2220), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2420 MMIO_DFH(_MMIO(0x12220), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2421 MMIO_DFH(_MMIO(0x22220), D_ALL, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2424 MMIO_DFH(_MMIO(0x22178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2425 MMIO_DFH(_MMIO(0x1a178), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2426 MMIO_DFH(_MMIO(0x1a17c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2427 MMIO_DFH(_MMIO(0x2217c), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_generic_mmio_info()
2495 #define RING_REG(base) _MMIO((base) + 0xd0) in init_bdw_mmio_info()
2501 #define RING_REG(base) _MMIO((base) + 0x230) in init_bdw_mmio_info()
2505 #define RING_REG(base) _MMIO((base) + 0x234) in init_bdw_mmio_info()
2510 #define RING_REG(base) _MMIO((base) + 0x244) in init_bdw_mmio_info()
2514 #define RING_REG(base) _MMIO((base) + 0x370) in init_bdw_mmio_info()
2518 #define RING_REG(base) _MMIO((base) + 0x3a0) in init_bdw_mmio_info()
2524 #define RING_REG(base) _MMIO((base) + 0x270) in init_bdw_mmio_info()
2538 MMIO_DFH(_MMIO(0xb1f0), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2539 MMIO_DFH(_MMIO(0xb1c0), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2541 MMIO_DFH(_MMIO(0xb100), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2542 MMIO_DFH(_MMIO(0xb10c), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2544 MMIO_F(_MMIO(0x24d0), 48, F_CMD_ACCESS | F_CMD_WRITE_PATCH, 0, 0, in init_bdw_mmio_info()
2547 MMIO_DFH(_MMIO(0x83a4), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2549 MMIO_DFH(_MMIO(0x8430), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2551 MMIO_DFH(_MMIO(0xe194), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2552 MMIO_DFH(_MMIO(0xe188), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2554 MMIO_DFH(_MMIO(0x2580), D_BDW_PLUS, F_MODE_MASK | F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2556 MMIO_DFH(_MMIO(0x2248), D_BDW, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2558 MMIO_DFH(_MMIO(0xe220), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2559 MMIO_DFH(_MMIO(0xe230), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2560 MMIO_DFH(_MMIO(0xe240), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2561 MMIO_DFH(_MMIO(0xe260), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2562 MMIO_DFH(_MMIO(0xe270), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2563 MMIO_DFH(_MMIO(0xe280), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2564 MMIO_DFH(_MMIO(0xe2a0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2565 MMIO_DFH(_MMIO(0xe2b0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2566 MMIO_DFH(_MMIO(0xe2c0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2567 MMIO_DFH(_MMIO(0x21f0), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_bdw_mmio_info()
2672 MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 1)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2673 MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 2)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2674 MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 3)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2675 MMIO_DH(_MMIO(_REG_701C0(PIPE_A, 4)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2677 MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 1)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2678 MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 2)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2679 MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 3)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2680 MMIO_DH(_MMIO(_REG_701C0(PIPE_B, 4)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2682 MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 1)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2683 MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 2)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2684 MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 3)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2685 MMIO_DH(_MMIO(_REG_701C0(PIPE_C, 4)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2687 MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 1)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2688 MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 2)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2689 MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 3)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2690 MMIO_DH(_MMIO(_REG_701C4(PIPE_A, 4)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2692 MMIO_DH(_MMIO(_REG_701C4(PIPE_B, 1)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2693 MMIO_DH(_MMIO(_REG_701C4(PIPE_B, 2)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2694 MMIO_DH(_MMIO(_REG_701C4(PIPE_B, 3)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2695 MMIO_DH(_MMIO(_REG_701C4(PIPE_B, 4)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2697 MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 1)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2698 MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 2)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2699 MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 3)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2700 MMIO_DH(_MMIO(_REG_701C4(PIPE_C, 4)), D_SKL_PLUS, NULL, NULL); in init_skl_mmio_info()
2722 MMIO_DFH(_MMIO(0x4dfc), D_SKL_PLUS, F_PM_SAVE, in init_skl_mmio_info()
2728 #define CSFE_CHICKEN1_REG(base) _MMIO((base) + 0xD4) in init_skl_mmio_info()
2738 MMIO_DFH(_MMIO(0xe4cc), D_BDW_PLUS, F_CMD_ACCESS, NULL, NULL); in init_skl_mmio_info()
2774 MMIO_DFH(_MMIO(0x20D8), D_BXT, F_CMD_ACCESS, NULL, NULL); in init_bxt_mmio_info()
2890 block->offset = _MMIO(offset); in handle_mmio_block()
3216 intel_uncore_write(&dev_priv->uncore, _MMIO(offset), vgpu_vreg(vgpu, offset)); in mmio_pm_restore_handler()