Lines Matching refs:gmbus
132 vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE; in reset_gmbus_controller()
161 vgpu->display.i2c_edid.gmbus.phase = GMBUS_IDLE_PHASE; in gmbus0_mmio_write()
209 i2c_edid->gmbus.total_byte_count = in gmbus1_mmio_write()
227 i2c_edid->gmbus.cycle_type = gmbus1_bus_cycle(wvalue); in gmbus1_mmio_write()
247 i2c_edid->gmbus.phase = GMBUS_IDLE_PHASE; in gmbus1_mmio_write()
259 i2c_edid->gmbus.phase = GMBUS_DATA_PHASE; in gmbus1_mmio_write()
292 int byte_left = i2c_edid->gmbus.total_byte_count - in gmbus3_mmio_read()
315 switch (i2c_edid->gmbus.cycle_type) { in gmbus3_mmio_read()
318 i2c_edid->gmbus.phase = GMBUS_IDLE_PHASE; in gmbus3_mmio_read()
323 i2c_edid->gmbus.phase = GMBUS_WAIT_PHASE; in gmbus3_mmio_read()
580 memset(&edid->gmbus, 0, sizeof(struct intel_vgpu_i2c_gmbus)); in intel_vgpu_init_i2c_edid()