224 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8c, (u8)((color_index & 0x0f) << 4));  in ast_set_vbios_color_reg()
226 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);  in ast_set_vbios_color_reg()
229 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);  in ast_set_vbios_color_reg()
230 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, format->cpp[0] * 8);  in ast_set_vbios_color_reg()
243 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8d, refresh_rate_index & 0xff);  in ast_set_vbios_mode_reg()
244 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);  in ast_set_vbios_mode_reg()
246 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0x00);  in ast_set_vbios_mode_reg()
249 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);  in ast_set_vbios_mode_reg()
250 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);  in ast_set_vbios_mode_reg()
251 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);  in ast_set_vbios_mode_reg()
252 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);  in ast_set_vbios_mode_reg()
253 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x96, adjusted_mode->crtc_vdisplay);  in ast_set_vbios_mode_reg()
254 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x97, adjusted_mode->crtc_vdisplay >> 8);  in ast_set_vbios_mode_reg()
272 	ast_set_index_reg(ast, AST_IO_SEQ_PORT, 0x00, 0x03);  in ast_set_std_reg()
276 		ast_set_index_reg(ast, AST_IO_SEQ_PORT, (i + 1), jreg);  in ast_set_std_reg()
282 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);  in ast_set_std_reg()
284 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);  in ast_set_std_reg()
286 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, stdtable->crtc[i]);  in ast_set_std_reg()
303 		ast_set_index_reg(ast, AST_IO_GR_PORT, i, stdtable->gr[i]);  in ast_set_std_reg()
421 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));  in ast_set_offset_reg()
422 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);  in ast_set_offset_reg()
476 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0xe0);  in ast_set_crtthd_reg()
477 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0xa0);  in ast_set_crtthd_reg()
480 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x78);  in ast_set_crtthd_reg()
481 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x60);  in ast_set_crtthd_reg()
486 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x3f);  in ast_set_crtthd_reg()
487 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x2f);  in ast_set_crtthd_reg()
489 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa7, 0x2f);  in ast_set_crtthd_reg()
490 		ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa6, 0x1f);  in ast_set_crtthd_reg()
515 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0d, (u8)(addr & 0xff));  in ast_set_start_address_crt1()
516 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x0c, (u8)((addr >> 8) & 0xff));  in ast_set_start_address_crt1()
517 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xaf, (u8)((addr >> 16) & 0xff));  in ast_set_start_address_crt1()
727 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc8, addr0);  in ast_set_cursor_base()
728 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc9, addr1);  in ast_set_cursor_base()
729 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xca, addr2);  in ast_set_cursor_base()
740 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc2, x_offset);  in ast_set_cursor_location()
741 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc3, y_offset);  in ast_set_cursor_location()
742 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc4, x0);  in ast_set_cursor_location()
743 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc5, x1);  in ast_set_cursor_location()
744 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc6, y0);  in ast_set_cursor_location()
745 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xc7, y1);  in ast_set_cursor_location()
1177 	ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xa1, 0x06);  in ast_crtc_helper_atomic_enable()