1413 		const ATOM_PPLIB_POWERPLAYTABLE4 *powerplay_table4 =  in init_clock_voltage_dependency()  local
1415 		if (0 != powerplay_table4->usVddcDependencyOnSCLKOffset) {  in init_clock_voltage_dependency()
1417 				(((unsigned long) powerplay_table4) +  in init_clock_voltage_dependency()
1418 				 le16_to_cpu(powerplay_table4->usVddcDependencyOnSCLKOffset));  in init_clock_voltage_dependency()
1423 		if (result == 0 && (0 != powerplay_table4->usVddciDependencyOnMCLKOffset)) {  in init_clock_voltage_dependency()
1425 				(((unsigned long) powerplay_table4) +  in init_clock_voltage_dependency()
1426 				 le16_to_cpu(powerplay_table4->usVddciDependencyOnMCLKOffset));  in init_clock_voltage_dependency()
1431 		if (result == 0 && (0 != powerplay_table4->usVddcDependencyOnMCLKOffset)) {  in init_clock_voltage_dependency()
1433 				(((unsigned long) powerplay_table4) +  in init_clock_voltage_dependency()
1434 				 le16_to_cpu(powerplay_table4->usVddcDependencyOnMCLKOffset));  in init_clock_voltage_dependency()
1439 		if (result == 0 && (0 != powerplay_table4->usMaxClockVoltageOnDCOffset)) {  in init_clock_voltage_dependency()
1441 				(((unsigned long) powerplay_table4) +  in init_clock_voltage_dependency()
1442 				 le16_to_cpu(powerplay_table4->usMaxClockVoltageOnDCOffset));  in init_clock_voltage_dependency()
1458 		if (result == 0 && (0 != powerplay_table4->usMvddDependencyOnMCLKOffset)) {  in init_clock_voltage_dependency()
1460 				(((unsigned long) powerplay_table4) +  in init_clock_voltage_dependency()
1461 				 le16_to_cpu(powerplay_table4->usMvddDependencyOnMCLKOffset));  in init_clock_voltage_dependency()
1616 		const ATOM_PPLIB_POWERPLAYTABLE4 *powerplay_table4 =  in init_phase_shedding_table()  local
1619 		if (0 != powerplay_table4->usVddcPhaseShedLimitsTableOffset) {  in init_phase_shedding_table()
1622 				(((unsigned long)powerplay_table4) +  in init_phase_shedding_table()
1623 				le16_to_cpu(powerplay_table4->usVddcPhaseShedLimitsTableOffset));  in init_phase_shedding_table()