Lines Matching refs:pp_hwmgr

41 	struct pp_hwmgr *hwmgr;  in amd_powerplay_create()
46 hwmgr = kzalloc(sizeof(struct pp_hwmgr), GFP_KERNEL); in amd_powerplay_create()
66 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in amd_powerplay_destroy()
97 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in pp_sw_init()
110 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in pp_sw_fini()
124 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in pp_hw_init()
137 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in pp_hw_fini()
149 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in pp_reserve_vram_for_smu()
178 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in pp_late_init()
223 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in pp_suspend()
231 struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; in pp_resume()
276 struct pp_hwmgr *hwmgr = handle; in pp_dpm_load_fw()
296 struct pp_hwmgr *hwmgr = handle; in pp_set_clockgating_by_smu()
309 static void pp_dpm_en_umd_pstate(struct pp_hwmgr *hwmgr, in pp_dpm_en_umd_pstate()
336 struct pp_hwmgr *hwmgr = handle; in pp_dpm_force_performance_level()
354 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_performance_level()
364 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_sclk()
378 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_mclk()
392 struct pp_hwmgr *hwmgr = handle; in pp_dpm_powergate_vce()
406 struct pp_hwmgr *hwmgr = handle; in pp_dpm_powergate_uvd()
421 struct pp_hwmgr *hwmgr = handle; in pp_dpm_dispatch_tasks()
431 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_current_power_state()
463 struct pp_hwmgr *hwmgr = handle; in pp_dpm_set_fan_control_mode()
481 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_fan_control_mode()
498 struct pp_hwmgr *hwmgr = handle; in pp_dpm_set_fan_speed_pwm()
514 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_fan_speed_pwm()
530 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_fan_speed_rpm()
546 struct pp_hwmgr *hwmgr = handle; in pp_dpm_set_fan_speed_rpm()
563 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_pp_num_states()
598 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_pp_table()
609 struct pp_hwmgr *hwmgr = handle; in amd_powerplay_reset()
625 struct pp_hwmgr *hwmgr = handle; in pp_dpm_set_pp_table()
656 struct pp_hwmgr *hwmgr = handle; in pp_dpm_force_clock_level()
679 struct pp_hwmgr *hwmgr = handle; in pp_dpm_emit_clock_levels()
693 struct pp_hwmgr *hwmgr = handle; in pp_dpm_print_clock_levels()
707 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_sclk_od()
721 struct pp_hwmgr *hwmgr = handle; in pp_dpm_set_sclk_od()
736 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_mclk_od()
750 struct pp_hwmgr *hwmgr = handle; in pp_dpm_set_mclk_od()
765 struct pp_hwmgr *hwmgr = handle; in pp_dpm_read_sensor()
791 struct pp_hwmgr *hwmgr = handle; in pp_dpm_get_vce_clock_state()
803 struct pp_hwmgr *hwmgr = handle; in pp_get_power_profile_mode()
815 struct pp_hwmgr *hwmgr = handle; in pp_set_power_profile_mode()
830 struct pp_hwmgr *hwmgr = handle; in pp_set_fine_grain_clk_vol()
843 struct pp_hwmgr *hwmgr = handle; in pp_odn_edit_dpm_table()
858 struct pp_hwmgr *hwmgr = handle; in pp_dpm_set_mp1_state()
875 struct pp_hwmgr *hwmgr = handle; in pp_dpm_switch_power_profile()
916 struct pp_hwmgr *hwmgr = handle; in pp_set_power_limit()
948 struct pp_hwmgr *hwmgr = handle; in pp_get_power_limit()
982 struct pp_hwmgr *hwmgr = handle; in pp_display_configuration_change()
994 struct pp_hwmgr *hwmgr = handle; in pp_get_display_power_level()
1007 struct pp_hwmgr *hwmgr = handle; in pp_get_current_clocks()
1052 struct pp_hwmgr *hwmgr = handle; in pp_get_clock_by_type()
1067 struct pp_hwmgr *hwmgr = handle; in pp_get_clock_by_type_with_latency()
1079 struct pp_hwmgr *hwmgr = handle; in pp_get_clock_by_type_with_voltage()
1090 struct pp_hwmgr *hwmgr = handle; in pp_set_watermarks_for_clocks_ranges()
1102 struct pp_hwmgr *hwmgr = handle; in pp_display_clock_voltage_request()
1113 struct pp_hwmgr *hwmgr = handle; in pp_get_display_mode_validation_clocks()
1129 struct pp_hwmgr *hwmgr = handle; in pp_dpm_powergate_mmhub()
1144 struct pp_hwmgr *hwmgr = handle; in pp_dpm_powergate_gfx()
1159 struct pp_hwmgr *hwmgr = handle; in pp_dpm_powergate_acp()
1174 struct pp_hwmgr *hwmgr = handle; in pp_dpm_powergate_sdma()
1225 struct pp_hwmgr *hwmgr = handle; in pp_notify_smu_enable_pwe()
1242 struct pp_hwmgr *hwmgr = handle; in pp_enable_mgpu_fan_boost()
1258 struct pp_hwmgr *hwmgr = handle; in pp_set_min_deep_sleep_dcefclk()
1275 struct pp_hwmgr *hwmgr = handle; in pp_set_hard_min_dcefclk_by_freq()
1292 struct pp_hwmgr *hwmgr = handle; in pp_set_hard_min_fclk_by_freq()
1309 struct pp_hwmgr *hwmgr = handle; in pp_set_active_display_count()
1319 struct pp_hwmgr *hwmgr = handle; in pp_get_asic_baco_capability()
1336 struct pp_hwmgr *hwmgr = handle; in pp_get_asic_baco_state()
1351 struct pp_hwmgr *hwmgr = handle; in pp_set_asic_baco_state()
1367 struct pp_hwmgr *hwmgr = handle; in pp_get_ppfeature_status()
1382 struct pp_hwmgr *hwmgr = handle; in pp_set_ppfeature_status()
1397 struct pp_hwmgr *hwmgr = handle; in pp_asic_reset_mode_2()
1412 struct pp_hwmgr *hwmgr = handle; in pp_smu_i2c_bus_access()
1427 struct pp_hwmgr *hwmgr = handle; in pp_set_df_cstate()
1442 struct pp_hwmgr *hwmgr = handle; in pp_set_xgmi_pstate()
1457 struct pp_hwmgr *hwmgr = handle; in pp_get_gpu_metrics()
1470 struct pp_hwmgr *hwmgr = handle; in pp_gfx_state_change_set()
1486 struct pp_hwmgr *hwmgr = handle; in pp_get_prv_buffer_details()
1504 struct pp_hwmgr *hwmgr = handle; in pp_pm_compute_clocks()