3283 					  const struct amdgpu_clock_and_voltage_limits *max_limits,  in btc_adjust_clock_combinations()  argument
3296 						      max_limits->sclk,  in btc_adjust_clock_combinations()
3303 						      max_limits->mclk,  in btc_adjust_clock_combinations()
3426 	struct amdgpu_clock_and_voltage_limits *max_limits;  in si_apply_state_adjust_rules()  local
3480 		max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_ac;  in si_apply_state_adjust_rules()
3482 		max_limits = &adev->pm.dpm.dyn_state.max_clock_voltage_on_dc;  in si_apply_state_adjust_rules()
3490 			if (ps->performance_levels[i].mclk > max_limits->mclk)  in si_apply_state_adjust_rules()
3491 				ps->performance_levels[i].mclk = max_limits->mclk;  in si_apply_state_adjust_rules()
3492 			if (ps->performance_levels[i].sclk > max_limits->sclk)  in si_apply_state_adjust_rules()
3493 				ps->performance_levels[i].sclk = max_limits->sclk;  in si_apply_state_adjust_rules()
3494 			if (ps->performance_levels[i].vddc > max_limits->vddc)  in si_apply_state_adjust_rules()
3495 				ps->performance_levels[i].vddc = max_limits->vddc;  in si_apply_state_adjust_rules()
3496 			if (ps->performance_levels[i].vddci > max_limits->vddci)  in si_apply_state_adjust_rules()
3497 				ps->performance_levels[i].vddci = max_limits->vddci;  in si_apply_state_adjust_rules()
3602 		btc_adjust_clock_combinations(adev, max_limits,  in si_apply_state_adjust_rules()
3610 						   max_limits->vddc,  &ps->performance_levels[i].vddc);  in si_apply_state_adjust_rules()
3613 						   max_limits->vddci, &ps->performance_levels[i].vddci);  in si_apply_state_adjust_rules()
3616 						   max_limits->vddc,  &ps->performance_levels[i].vddc);  in si_apply_state_adjust_rules()
3619 						   max_limits->vddc,  &ps->performance_levels[i].vddc);  in si_apply_state_adjust_rules()
3624 					      max_limits->vddc, max_limits->vddci,  in si_apply_state_adjust_rules()