900 	struct xor_regs *xor_reg;  in ppc440spe_adma_device_clear_eot_status()  local
982 		xor_reg = chan->device->xor_reg;  in ppc440spe_adma_device_clear_eot_status()
983 		rv = ioread32be(&xor_reg->sr);  in ppc440spe_adma_device_clear_eot_status()
984 		iowrite32be(rv, &xor_reg->sr);  in ppc440spe_adma_device_clear_eot_status()
991 				u32 val = ioread32be(&xor_reg->ccbalr);  in ppc440spe_adma_device_clear_eot_status()
993 				iowrite32be(val, &xor_reg->cblalr);  in ppc440spe_adma_device_clear_eot_status()
995 				val = ioread32be(&xor_reg->crsr);  in ppc440spe_adma_device_clear_eot_status()
997 					    &xor_reg->crsr);  in ppc440spe_adma_device_clear_eot_status()
1006 		if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) &&  in ppc440spe_adma_device_clear_eot_status()
1019 	struct xor_regs *xor_reg;  in ppc440spe_chan_is_busy()  local
1036 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_is_busy()
1037 		busy = (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT) ? 1 : 0;  in ppc440spe_chan_is_busy()
1051 	struct xor_regs *xor_reg = chan->device->xor_reg;  in ppc440spe_chan_set_first_xor_descriptor()  local
1053 	if (ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)  in ppc440spe_chan_set_first_xor_descriptor()
1060 	iowrite32be(XOR_CRSR_64BA_BIT, &xor_reg->crsr);  in ppc440spe_chan_set_first_xor_descriptor()
1062 	iowrite32be(next_desc->phys, &xor_reg->cblalr);  in ppc440spe_chan_set_first_xor_descriptor()
1063 	iowrite32be(0, &xor_reg->cblahr);  in ppc440spe_chan_set_first_xor_descriptor()
1064 	iowrite32be(ioread32be(&xor_reg->cbcr) | XOR_CBCR_LNK_BIT,  in ppc440spe_chan_set_first_xor_descriptor()
1065 		    &xor_reg->cbcr);  in ppc440spe_chan_set_first_xor_descriptor()
1096 	struct xor_regs *xor_reg;  in ppc440spe_chan_append()  local
1136 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_append()
1145 		if (!(ioread32be(&xor_reg->sr) & XOR_SR_XCP_BIT)) {  in ppc440spe_chan_append()
1155 			iowrite32be(ioread32be(&xor_reg->crsr) |  in ppc440spe_chan_append()
1157 				    &xor_reg->crsr);  in ppc440spe_chan_append()
1176 	struct xor_regs *xor_reg;  in ppc440spe_chan_get_current_descriptor()  local
1188 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_get_current_descriptor()
1189 		return ioread32be(&xor_reg->ccbalr);  in ppc440spe_chan_get_current_descriptor()
1199 	struct xor_regs *xor_reg;  in ppc440spe_chan_run()  local
1208 		xor_reg = chan->device->xor_reg;  in ppc440spe_chan_run()
1212 			    &xor_reg->crsr);  in ppc440spe_chan_run()
3929 			    &adev->xor_reg->ier);  in ppc440spe_adma_setup_irqs()
3978 		mask = ioread32be(&adev->xor_reg->ier);  in ppc440spe_adma_release_irqs()
3981 		iowrite32be(mask, &adev->xor_reg->ier);  in ppc440spe_adma_release_irqs()
4099 		adev->xor_reg = regs;  in ppc440spe_adma_probe()
4101 		iowrite32be(XOR_CRSR_XASR_BIT, &adev->xor_reg->crsr);  in ppc440spe_adma_probe()
4102 		iowrite32be(XOR_CRSR_64BA_BIT, &adev->xor_reg->crrr);  in ppc440spe_adma_probe()
4212 		iounmap(adev->xor_reg);  in ppc440spe_adma_probe()
4275 		iounmap(adev->xor_reg);  in ppc440spe_adma_remove()