Lines Matching refs:CLKCON
23 #define CLKCON 0x0c macro
38 CLKCON,
106 GATE(PCLK_WDT, "wdt", "pclk", CLKCON, 28, 0, 0),
107 GATE(PCLK_SPI, "spi", "pclk", CLKCON, 27, 0, 0),
108 GATE(PCLK_I2S, "i2s", "pclk", CLKCON, 26, 0, 0),
109 GATE(PCLK_I2C, "i2c", "pclk", CLKCON, 25, 0, 0),
110 GATE(PCLK_ADC, "adc", "pclk", CLKCON, 24, 0, 0),
111 GATE(PCLK_RTC, "rtc", "pclk", CLKCON, 23, 0, 0),
112 GATE(PCLK_GPIO, "gpio", "pclk", CLKCON, 22, CLK_IGNORE_UNUSED, 0),
113 GATE(PCLK_UART2, "uart2", "pclk", CLKCON, 21, 0, 0),
114 GATE(PCLK_UART1, "uart1", "pclk", CLKCON, 20, 0, 0),
115 GATE(PCLK_UART0, "uart0", "pclk", CLKCON, 19, 0, 0),
116 GATE(PCLK_SDI, "sdi", "pclk", CLKCON, 18, 0, 0),
117 GATE(PCLK_PWM, "pwm", "pclk", CLKCON, 17, 0, 0),
118 GATE(PCLK_USBD, "usb-device", "pclk", CLKCON, 16, 0, 0),
119 GATE(SCLK_CAM, "sclk_cam", "div_cam", CLKCON, 15, 0, 0),
120 GATE(SCLK_UART, "sclk_uart", "div_uart", CLKCON, 14, 0, 0),
121 GATE(SCLK_I2S, "sclk_i2s", "div_i2s", CLKCON, 13, 0, 0),
122 GATE(SCLK_USBH, "sclk_usbh", "div_usb", CLKCON, 12, 0, 0),
123 GATE(SCLK_USBD, "sclk_usbd", "div_usb", CLKCON, 11, 0, 0),
124 GATE(HCLK_HALF, "hclk_half", "div_hclk_half", CLKCON, 10, CLK_IGNORE_UNUSED, 0),
125 GATE(HCLK_X2, "hclkx2", "ff_hclk", CLKCON, 9, CLK_IGNORE_UNUSED, 0),
126 GATE(HCLK_SDRAM, "sdram", "hclk", CLKCON, 8, CLK_IGNORE_UNUSED, 0),
127 GATE(HCLK_USBH, "usb-host", "hclk", CLKCON, 6, 0, 0),
128 GATE(HCLK_LCD, "lcd", "hclk", CLKCON, 5, 0, 0),
129 GATE(HCLK_NAND, "nand", "hclk", CLKCON, 4, 0, 0),
130 GATE(HCLK_DMA3, "dma3", "hclk", CLKCON, 3, CLK_IGNORE_UNUSED, 0),
131 GATE(HCLK_DMA2, "dma2", "hclk", CLKCON, 2, CLK_IGNORE_UNUSED, 0),
132 GATE(HCLK_DMA1, "dma1", "hclk", CLKCON, 1, CLK_IGNORE_UNUSED, 0),
133 GATE(HCLK_DMA0, "dma0", "hclk", CLKCON, 0, CLK_IGNORE_UNUSED, 0),