Lines Matching refs:MHZ

1400 	PLL_35XX_RATE(24 * MHZ, 2000000000, 250, 3, 0),
1401 	PLL_35XX_RATE(24 * MHZ, 1900000000, 475, 6, 0),
1402 	PLL_35XX_RATE(24 * MHZ, 1800000000, 225, 3, 0),
1403 	PLL_35XX_RATE(24 * MHZ, 1700000000, 425, 6, 0),
1404 	PLL_35XX_RATE(24 * MHZ, 1600000000, 200, 3, 0),
1405 	PLL_35XX_RATE(24 * MHZ, 1500000000, 250, 4, 0),
1406 	PLL_35XX_RATE(24 * MHZ, 1400000000, 175, 3, 0),
1407 	PLL_35XX_RATE(24 * MHZ, 1300000000, 325, 6, 0),
1408 	PLL_35XX_RATE(24 * MHZ, 1200000000, 200, 2, 1),
1409 	PLL_35XX_RATE(24 * MHZ, 1100000000, 275, 3, 1),
1410 	PLL_35XX_RATE(24 * MHZ, 1000000000, 250, 3, 1),
1411 	PLL_35XX_RATE(24 * MHZ, 900000000,  150, 2, 1),
1412 	PLL_35XX_RATE(24 * MHZ, 800000000,  200, 3, 1),
1413 	PLL_35XX_RATE(24 * MHZ, 700000000,  175, 3, 1),
1414 	PLL_35XX_RATE(24 * MHZ, 600000000,  200, 2, 2),
1415 	PLL_35XX_RATE(24 * MHZ, 500000000,  250, 3, 2),
1416 	PLL_35XX_RATE(24 * MHZ, 400000000,  200, 3, 2),
1417 	PLL_35XX_RATE(24 * MHZ, 300000000,  200, 2, 3),
1418 	PLL_35XX_RATE(24 * MHZ, 200000000,  200, 3, 3),
1422 	PLL_35XX_RATE(24 * MHZ, 825000000, 275, 4, 1),
1423 	PLL_35XX_RATE(24 * MHZ, 728000000, 182, 3, 1),
1424 	PLL_35XX_RATE(24 * MHZ, 633000000, 211, 4, 1),
1425 	PLL_35XX_RATE(24 * MHZ, 543000000, 181, 2, 2),
1426 	PLL_35XX_RATE(24 * MHZ, 413000000, 413, 6, 2),
1427 	PLL_35XX_RATE(24 * MHZ, 275000000, 275, 3, 3),
1428 	PLL_35XX_RATE(24 * MHZ, 206000000, 206, 3, 3),
1429 	PLL_35XX_RATE(24 * MHZ, 165000000, 110, 2, 3),
1433 	PLL_36XX_RATE(24 * MHZ, 600000000U, 100, 2, 1, 0),
1434 	PLL_36XX_RATE(24 * MHZ, 400000000U, 200, 3, 2, 0),
1435 	PLL_36XX_RATE(24 * MHZ, 393216003U, 197, 3, 2, -25690),
1436 	PLL_36XX_RATE(24 * MHZ, 361267218U, 301, 5, 2, 3671),
1437 	PLL_36XX_RATE(24 * MHZ, 200000000U, 200, 3, 3, 0),
1438 	PLL_36XX_RATE(24 * MHZ, 196608001U, 197, 3, 3, -25690),
1439 	PLL_36XX_RATE(24 * MHZ, 180633609U, 301, 5, 3, 3671),
1440 	PLL_36XX_RATE(24 * MHZ, 131072006U, 131, 3, 3, 4719),
1441 	PLL_36XX_RATE(24 * MHZ, 100000000U, 200, 3, 4, 0),
1442 	PLL_36XX_RATE(24 * MHZ,  73728000U, 98, 2, 4, 19923),
1443 	PLL_36XX_RATE(24 * MHZ,  67737602U, 90, 2, 4, 20762),
1444 	PLL_36XX_RATE(24 * MHZ,  65536003U, 131, 3, 4, 4719),
1445 	PLL_36XX_RATE(24 * MHZ,  49152000U, 197, 3, 5, -25690),
1446 	PLL_36XX_RATE(24 * MHZ,  45158401U, 90, 3, 4, 20762),
1447 	PLL_36XX_RATE(24 * MHZ,  32768001U, 131, 3, 5, 4719),
1451 	PLL_35XX_RATE(24 * MHZ, 600000000U,  200, 2, 2),
1452 	PLL_35XX_RATE(24 * MHZ, 543000000U,  181, 2, 2),
1453 	PLL_35XX_RATE(24 * MHZ, 480000000U,  160, 2, 2),
1454 	PLL_35XX_RATE(24 * MHZ, 420000000U,  140, 2, 2),
1455 	PLL_35XX_RATE(24 * MHZ, 350000000U,  175, 3, 2),
1456 	PLL_35XX_RATE(24 * MHZ, 266000000U,  266, 3, 3),
1457 	PLL_35XX_RATE(24 * MHZ, 177000000U,  118, 2, 3),
1458 	PLL_35XX_RATE(24 * MHZ, 100000000U,  200, 3, 4),
1597 	if (clk_hw_get_rate(hws[CLK_FIN_PLL]) == 24 * MHZ) {  in exynos5x_clk_init()