Lines Matching refs:DFLAGS
238 #define DFLAGS CLK_DIVIDER_HIWORD_MASK macro
284 RK2928_CLKSEL_CON(0), 6, 2, DFLAGS | CLK_DIVIDER_READ_ONLY,
288 RK2928_CLKSEL_CON(32), 7, 1, MFLAGS, 0, 5, DFLAGS,
293 RK2928_CLKSEL_CON(32), 15, 1, MFLAGS, 8, 5, DFLAGS,
301 RK2928_CLKSEL_CON(26), 8, 1, MFLAGS, 0, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
315 RK2928_CLKSEL_CON(31), 7, 1, MFLAGS, 0, 5, DFLAGS,
318 RK2928_CLKSEL_CON(31), 15, 1, MFLAGS, 8, 5, DFLAGS,
324 RK2928_CLKSEL_CON(10), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
327 RK2928_CLKSEL_CON(10), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
333 RK2928_CLKSEL_CON(29), 1, 5, DFLAGS,
355 RK2928_CLKSEL_CON(21), 0, 1, MFLAGS, 8, 5, DFLAGS,
363 RK2928_CLKSEL_CON(22), 0, 1, MFLAGS, 8, 8, DFLAGS,
373 RK2928_CLKSEL_CON(24), 8, 8, DFLAGS,
377 RK2928_CLKSEL_CON(5), 0, 7, DFLAGS,
392 RK2928_CLKSEL_CON(25), 0, 7, DFLAGS,
395 RK2928_CLKSEL_CON(25), 8, 7, DFLAGS,
399 RK2928_CLKSEL_CON(11), 0, 6, DFLAGS,
402 RK2928_CLKSEL_CON(12), 0, 6, DFLAGS,
405 RK2928_CLKSEL_CON(12), 8, 6, DFLAGS,
411 RK2928_CLKSEL_CON(13), 0, 7, DFLAGS,
418 RK2928_CLKSEL_CON(14), 0, 7, DFLAGS,
425 RK2928_CLKSEL_CON(15), 0, 7, DFLAGS,
432 RK2928_CLKSEL_CON(16), 0, 7, DFLAGS,
560 RK2928_CLKSEL_CON(1), 0, 3, DFLAGS | CLK_DIVIDER_READ_ONLY, div_aclk_cpu_t),
562 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
565 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
568 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO
576 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
580 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
585 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
591 RK2928_CLKSEL_CON(29), 8, 5, DFLAGS,
602 RK2928_CLKSEL_CON(33), 8, 1, MFLAGS, 0, 5, DFLAGS,
611 RK2928_CLKSEL_CON(34), 0, 16, DFLAGS,
617 RK2928_CLKSEL_CON(2), 0, 7, DFLAGS,
624 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,
631 RK2928_CLKSEL_CON(4), 0, 7, DFLAGS,
677 RK2928_CLKSEL_CON(1), 3, 3, DFLAGS | CLK_DIVIDER_READ_ONLY,
682 RK2928_CLKSEL_CON(0), 5, 1, MFLAGS, 0, 5, DFLAGS),
684 RK2928_CLKSEL_CON(1), 12, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
686 RK2928_CLKSEL_CON(1), 8, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO),
688 RK2928_CLKSEL_CON(1), 14, 2, DFLAGS | CLK_DIVIDER_POWER_OF_TWO,
695 RK2928_CLKSEL_CON(10), 15, 1, MFLAGS, 0, 5, DFLAGS,
699 RK2928_CLKSEL_CON(27), 0, 1, MFLAGS, 8, 8, DFLAGS,
702 RK2928_CLKSEL_CON(28), 0, 1, MFLAGS, 8, 8, DFLAGS,
706 RK2928_CLKSEL_CON(34), 7, 1, MFLAGS, 0, 5, DFLAGS,
718 RK2928_CLKSEL_CON(30), 0, 2, DFLAGS,
721 RK2928_CLKSEL_CON(11), 8, 6, DFLAGS),
726 RK2928_CLKSEL_CON(3), 0, 7, DFLAGS,