Lines Matching refs:R8A7795_CLK_S3D2
100 DEF_FIXED("s3d2", R8A7795_CLK_S3D2, CLK_S3, 2, 1),
135 DEF_MOD("tmu3", 122, R8A7795_CLK_S3D2),
136 DEF_MOD("tmu2", 123, R8A7795_CLK_S3D2),
137 DEF_MOD("tmu1", 124, R8A7795_CLK_S3D2),
175 DEF_MOD("drif31", 508, R8A7795_CLK_S3D2),
176 DEF_MOD("drif30", 509, R8A7795_CLK_S3D2),
177 DEF_MOD("drif21", 510, R8A7795_CLK_S3D2),
178 DEF_MOD("drif20", 511, R8A7795_CLK_S3D2),
179 DEF_MOD("drif11", 512, R8A7795_CLK_S3D2),
180 DEF_MOD("drif10", 513, R8A7795_CLK_S3D2),
181 DEF_MOD("drif01", 514, R8A7795_CLK_S3D2),
182 DEF_MOD("drif00", 515, R8A7795_CLK_S3D2),
214 DEF_MOD("ehci3", 700, R8A7795_CLK_S3D2),
215 DEF_MOD("ehci2", 701, R8A7795_CLK_S3D2),
216 DEF_MOD("ehci1", 702, R8A7795_CLK_S3D2),
217 DEF_MOD("ehci0", 703, R8A7795_CLK_S3D2),
218 DEF_MOD("hsusb", 704, R8A7795_CLK_S3D2),
219 DEF_MOD("hsusb3", 705, R8A7795_CLK_S3D2),
245 DEF_MOD("sata0", 815, R8A7795_CLK_S3D2),
258 DEF_MOD("can-fd", 914, R8A7795_CLK_S3D2),
267 DEF_MOD("i2c2", 929, R8A7795_CLK_S3D2),
268 DEF_MOD("i2c1", 930, R8A7795_CLK_S3D2),
269 DEF_MOD("i2c0", 931, R8A7795_CLK_S3D2),
374 { MOD_CLK_ID(121), R8A7795_CLK_S3D2 }, /* TMU4 */
407 { MOD_CLK_ID(812), R8A7795_CLK_S3D2 }, /* EAVB-IF */
420 { MOD_CLK_ID(918), R8A7795_CLK_S3D2 }, /* I2C6 */
421 { MOD_CLK_ID(919), R8A7795_CLK_S3D2 }, /* I2C5 */
422 { MOD_CLK_ID(927), R8A7795_CLK_S3D2 }, /* I2C4 */
423 { MOD_CLK_ID(928), R8A7795_CLK_S3D2 }, /* I2C3 */