Lines Matching refs:apbc_base
83 void __iomem *apbc_base; in mmp2_clk_init() local
97 apbc_base = ioremap(apbc_phys, SZ_4K); in mmp2_clk_init()
98 if (!apbc_base) { in mmp2_clk_init()
194 apbc_base + APBC_TWSI0, 10, 0, &clk_lock); in mmp2_clk_init()
198 apbc_base + APBC_TWSI1, 10, 0, &clk_lock); in mmp2_clk_init()
202 apbc_base + APBC_TWSI2, 10, 0, &clk_lock); in mmp2_clk_init()
206 apbc_base + APBC_TWSI3, 10, 0, &clk_lock); in mmp2_clk_init()
210 apbc_base + APBC_TWSI4, 10, 0, &clk_lock); in mmp2_clk_init()
214 apbc_base + APBC_TWSI5, 10, 0, &clk_lock); in mmp2_clk_init()
218 apbc_base + APBC_GPIO, 10, 0, &clk_lock); in mmp2_clk_init()
222 apbc_base + APBC_KPC, 10, 0, &clk_lock); in mmp2_clk_init()
226 apbc_base + APBC_RTC, 10, 0, &clk_lock); in mmp2_clk_init()
230 apbc_base + APBC_PWM0, 10, 0, &clk_lock); in mmp2_clk_init()
234 apbc_base + APBC_PWM1, 10, 0, &clk_lock); in mmp2_clk_init()
238 apbc_base + APBC_PWM2, 10, 0, &clk_lock); in mmp2_clk_init()
242 apbc_base + APBC_PWM3, 10, 0, &clk_lock); in mmp2_clk_init()
248 apbc_base + APBC_UART0, 4, 3, 0, &clk_lock); in mmp2_clk_init()
253 apbc_base + APBC_UART0, 10, 0, &clk_lock); in mmp2_clk_init()
259 apbc_base + APBC_UART1, 4, 3, 0, &clk_lock); in mmp2_clk_init()
264 apbc_base + APBC_UART1, 10, 0, &clk_lock); in mmp2_clk_init()
270 apbc_base + APBC_UART2, 4, 3, 0, &clk_lock); in mmp2_clk_init()
275 apbc_base + APBC_UART2, 10, 0, &clk_lock); in mmp2_clk_init()
281 apbc_base + APBC_UART3, 4, 3, 0, &clk_lock); in mmp2_clk_init()
286 apbc_base + APBC_UART3, 10, 0, &clk_lock); in mmp2_clk_init()
292 apbc_base + APBC_SSP0, 4, 3, 0, &clk_lock); in mmp2_clk_init()
296 apbc_base + APBC_SSP0, 10, 0, &clk_lock); in mmp2_clk_init()
302 apbc_base + APBC_SSP1, 4, 3, 0, &clk_lock); in mmp2_clk_init()
306 apbc_base + APBC_SSP1, 10, 0, &clk_lock); in mmp2_clk_init()
312 apbc_base + APBC_SSP2, 4, 3, 0, &clk_lock); in mmp2_clk_init()
316 apbc_base + APBC_SSP2, 10, 0, &clk_lock); in mmp2_clk_init()
322 apbc_base + APBC_SSP3, 4, 3, 0, &clk_lock); in mmp2_clk_init()
326 apbc_base + APBC_SSP3, 10, 0, &clk_lock); in mmp2_clk_init()