97 #define imx_clk_cpu(name, parent_name, div, mux, pll, step) \  argument
100 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \  argument
105 #define imx_clk_pllv3(type, name, parent_name, base, div_mask) \  argument
108 #define imx_clk_pfd(name, parent_name, reg, idx) \  argument
111 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \  argument
114 #define imx_clk_fixed(name, rate) \  argument
117 #define imx_clk_fixed_factor(name, parent, mult, div) \  argument
120 #define imx_clk_divider(name, parent, reg, shift, width) \  argument
123 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \  argument
126 #define imx_clk_gate(name, parent, reg, shift) \  argument
129 #define imx_clk_gate_dis(name, parent, reg, shift) \  argument
132 #define imx_clk_gate2(name, parent, reg, shift) \  argument
135 #define imx_clk_gate2_cgr(name, parent, reg, shift, cgr_val) \  argument
138 #define imx_clk_gate2_flags(name, parent, reg, shift, flags) \  argument
141 #define imx_clk_mux(name, reg, shift, width, parents, num_parents) \  argument
144 #define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \  argument
147 #define imx_clk_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \  argument
150 #define imx_clk_pllv1(type, name, parent, base) \  argument
153 #define imx_clk_pllv2(name, parent, base) \  argument
156 #define imx_clk_mux_flags(name, reg, shift, width, parents, num_parents, flags) \  argument
159 #define imx_clk_hw_gate(name, parent, reg, shift) \  argument
162 #define imx_clk_hw_gate2(name, parent, reg, shift) \  argument
165 #define imx_clk_hw_gate_dis(name, parent, reg, shift) \  argument
168 #define imx_clk_hw_gate_dis_flags(name, parent, reg, shift, flags) \  argument
171 #define imx_clk_hw_gate_flags(name, parent, reg, shift, flags) \  argument
174 #define imx_clk_hw_gate2_flags(name, parent, reg, shift, flags) \  argument
177 #define imx_clk_hw_gate2_shared(name, parent, reg, shift, shared_count) \  argument
180 #define imx_clk_hw_gate2_shared2(name, parent, reg, shift, shared_count) \  argument
183 #define imx_clk_hw_gate3(name, parent, reg, shift) \  argument
186 #define imx_clk_hw_gate3_flags(name, parent, reg, shift, flags) \  argument
189 #define imx_clk_hw_gate4(name, parent, reg, shift) \  argument
192 #define imx_clk_hw_gate4_flags(name, parent, reg, shift, flags) \  argument
195 #define imx_clk_hw_mux2(name, reg, shift, width, parents, num_parents) \  argument
198 #define imx_clk_hw_mux(name, reg, shift, width, parents, num_parents) \  argument
201 #define imx_clk_hw_mux_flags(name, reg, shift, width, parents, num_parents, flags) \  argument
204 #define imx_clk_hw_mux_ldb(name, reg, shift, width, parents, num_parents) \  argument
207 #define imx_clk_hw_mux2_flags(name, reg, shift, width, parents, num_parents, flags) \  argument
210 #define imx_clk_hw_divider(name, parent, reg, shift, width) \  argument
213 #define imx_clk_hw_divider2(name, parent, reg, shift, width) \  argument
217 #define imx_clk_hw_divider_flags(name, parent, reg, shift, width, flags) \  argument
220 #define imx_clk_hw_pll14xx(name, parent_name, base, pll_clk) \  argument
338 static inline struct clk_hw *imx_clk_hw_fixed(const char *name, int rate)  in imx_clk_hw_fixed()
343 static inline struct clk_hw *imx_clk_hw_fixed_factor(const char *name,  in imx_clk_hw_fixed_factor()
350 static inline struct clk_hw *__imx_clk_hw_divider(const char *name,  in __imx_clk_hw_divider()
359 static inline struct clk_hw *__imx_clk_hw_gate(const char *name, const char *parent,  in __imx_clk_hw_gate()
368 static inline struct clk_hw *__imx_clk_hw_gate2(const char *name, const char *parent,  in __imx_clk_hw_gate2()
377 static inline struct clk_hw *__imx_clk_hw_mux(const char *name, void __iomem *reg,  in __imx_clk_hw_mux()
410 #define _imx8m_clk_hw_composite(name, parent_names, reg, composite_flags, flags) \  argument
414 #define imx8m_clk_hw_composite(name, parent_names, reg) \  argument
418 #define imx8m_clk_hw_composite_critical(name, parent_names, reg) \  argument
422 #define imx8m_clk_hw_composite_bus(name, parent_names, reg)	\  argument
426 #define imx8m_clk_hw_composite_bus_critical(name, parent_names, reg)	\  argument
430 #define imx8m_clk_hw_composite_core(name, parent_names, reg)	\  argument
434 #define imx8m_clk_hw_fw_managed_composite(name, parent_names, reg) \  argument
439 #define imx8m_clk_hw_fw_managed_composite_critical(name, parent_names, reg) \  argument
449 #define imx93_clk_composite(name, parent_names, num_parents, reg) \  argument