Lines Matching refs:divider_reg
429 void __iomem *divider_reg; /* CSR for divider */ member
538 if (pclk->param.divider_reg) { in xgene_clk_recalc_rate()
539 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_recalc_rate()
568 if (pclk->param.divider_reg) { in xgene_clk_set_rate()
577 data = xgene_clk_read(pclk->param.divider_reg + in xgene_clk_set_rate()
582 xgene_clk_write(data, pclk->param.divider_reg + in xgene_clk_set_rate()
603 if (pclk->param.divider_reg) { in xgene_clk_round_rate()
680 parameters.divider_reg = NULL; in xgene_devclk_init()
697 parameters.divider_reg = map_res; in xgene_devclk_init()
735 if (parameters.divider_reg) in xgene_devclk_init()
736 iounmap(parameters.divider_reg); in xgene_devclk_init()