Lines Matching refs:rd_full
204 channel->rd_full = 0; in xillybus_isr()
485 channel->rd_full = 0; in xilly_setupchannels()
1066 (channel->rd_full || in xillybus_myflush()
1083 channel->rd_full = 1; in xillybus_myflush()
1130 channel->rd_full = 1; /* in xillybus_myflush()
1135 empty = !channel->rd_full; in xillybus_myflush()
1149 (!channel->rd_full)); in xillybus_myflush()
1153 (!channel->rd_full), in xillybus_myflush()
1162 if (channel->rd_full) { in xillybus_myflush()
1228 full = channel->rd_full; in xillybus_write()
1282 channel->rd_full = 1; in xillybus_write()
1299 exhausted = channel->rd_full; in xillybus_write()
1392 (!channel->rd_full))) { in xillybus_write()
1538 channel->rd_full = 0; in xillybus_open()
1783 if (!channel->rd_full) in xillybus_poll()