99 #define TSB_CAS_TAG_HIGH(TSB, REG1, REG2) \  argument
100 661:	casa		[TSB] ASI_N, REG1, REG2; \
103 	casa		[TSB] ASI_PHYS_USE_EC, REG1, REG2; \
106 #define TSB_CAS_TAG(TSB, REG1, REG2) \  argument
107 661:	casxa		[TSB] ASI_N, REG1, REG2; \
110 	casxa		[TSB] ASI_PHYS_USE_EC, REG1, REG2; \
120 #define TSB_LOCK_TAG(TSB, REG1, REG2)	\  argument
121 99:	TSB_LOAD_TAG_HIGH(TSB, REG1);	\
123 	andcc	REG1, REG2, %g0;	\
126 	TSB_CAS_TAG_HIGH(TSB, REG1, REG2);	\
127 	cmp	REG1, REG2;		\
156 #define KERN_PGTABLE_WALK(VADDR, REG1, REG2, FAIL_LABEL)	\  argument
157 	sethi		%hi(swapper_pg_dir), REG1; \
158 	or		REG1, %lo(swapper_pg_dir), REG1; \
162 	ldx		[REG1 + REG2], REG1; \
163 	brz,pn		REG1, FAIL_LABEL; \
167 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
168 	brz,pn		REG1, FAIL_LABEL; \
170 	brz,pn		REG1, FAIL_LABEL; \
172 	andcc		REG1, REG2, %g0; \
179 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
181 	brz,pn		REG1, FAIL_LABEL; \
183 	andcc		REG1, REG2, %g0; \
186 697:	brgez,pn	REG1, FAIL_LABEL; \
187 	 andn		REG1, REG2, REG1; \
190 	 or		REG1, REG2, REG1; \
194 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
195 	brgez,pn	REG1, FAIL_LABEL; \
208 #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
215 	brz,pn		REG1, FAIL_LABEL;		\
218 	andcc		REG1, REG2, %g0;		\
222 	brgez,pn	REG1, FAIL_LABEL;		\
223 	 andn		REG1, REG2, REG1;		\
225 	brlz,pt		REG1, PTE_LABEL;		\
226 	 or		REG1, REG2, REG1;		\
229 #define USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
230 	brz,pn		REG1, FAIL_LABEL; \
243 #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
244 	brz,pn		REG1, FAIL_LABEL;		\
247 	andcc		REG1, REG2, %g0;		\
250 	brgez,pn	REG1, FAIL_LABEL;		\
251 	 andn		REG1, REG2, REG1;		\
253 	brlz,pt		REG1, PTE_LABEL;		\
254 	 or		REG1, REG2, REG1;		\
257 #define USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, PTE_LABEL) \  argument
258 	brz,pn		REG1, FAIL_LABEL; \
271 #define USER_PGTABLE_WALK_TL1(VADDR, PHYS_PGD, REG1, REG2, FAIL_LABEL)	\  argument
275 	ldxa		[PHYS_PGD + REG2] ASI_PHYS_USE_EC, REG1; \
276 	brz,pn		REG1, FAIL_LABEL; \
280 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
281 	USER_PGTABLE_CHECK_PUD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \
282 	brz,pn		REG1, FAIL_LABEL; \
286 	ldxa		[REG1 + REG2] ASI_PHYS_USE_EC, REG1; \
287 	USER_PGTABLE_CHECK_PMD_HUGE(VADDR, REG1, REG2, FAIL_LABEL, 800f) \
291 	add		REG1, REG2, REG1; \
292 	ldxa		[REG1] ASI_PHYS_USE_EC, REG1; \
293 	brgez,pn	REG1, FAIL_LABEL; \
302 #define OBP_TRANS_LOOKUP(VADDR, REG1, REG2, REG3, FAIL_LABEL) \  argument
303 	sethi		%hi(prom_trans), REG1; \
304 	or		REG1, %lo(prom_trans), REG1; \
305 97:	ldx		[REG1 + 0x00], REG2; \
308 	ldx		[REG1 + 0x08], REG3; \
314 	 ldx		[REG1 + 0x10], REG3; \
317 	 add		REG3, REG2, REG1; \
319 	 add		REG1, (3 * 8), REG1; \
338 #define KERN_TSB_LOOKUP_TL1(VADDR, TAG, REG1, REG2, REG3, REG4, OK_LABEL) \  argument
339 661:	sethi		%uhi(swapper_tsb), REG1; \
341 	or		REG1, %ulo(swapper_tsb), REG1; \
346 	sllx		REG1, 32, REG1; \
347 	or		REG1, REG2, REG1; \
351 	add		REG1, REG2, REG2; \
355 	 mov		REG4, REG1;
361 #define KERN_TSB4M_LOOKUP_TL1(TAG, REG1, REG2, REG3, REG4, OK_LABEL) \  argument
362 661:	sethi		%uhi(swapper_4m_tsb), REG1; \
364 	or		REG1, %ulo(swapper_4m_tsb), REG1; \
369 	sllx		REG1, 32, REG1; \
370 	or		REG1, REG2, REG1; \
373 	add		REG1, REG2, REG2; \
377 	 mov		REG4, REG1;