Lines Matching refs:CPUMF_EVENT_PTR
370 CPUMF_EVENT_PTR(cf_fvn1, CPU_CYCLES),
371 CPUMF_EVENT_PTR(cf_fvn1, INSTRUCTIONS),
372 CPUMF_EVENT_PTR(cf_fvn1, L1I_DIR_WRITES),
373 CPUMF_EVENT_PTR(cf_fvn1, L1I_PENALTY_CYCLES),
374 CPUMF_EVENT_PTR(cf_fvn1, PROBLEM_STATE_CPU_CYCLES),
375 CPUMF_EVENT_PTR(cf_fvn1, PROBLEM_STATE_INSTRUCTIONS),
376 CPUMF_EVENT_PTR(cf_fvn1, PROBLEM_STATE_L1I_DIR_WRITES),
377 CPUMF_EVENT_PTR(cf_fvn1, PROBLEM_STATE_L1I_PENALTY_CYCLES),
378 CPUMF_EVENT_PTR(cf_fvn1, PROBLEM_STATE_L1D_DIR_WRITES),
379 CPUMF_EVENT_PTR(cf_fvn1, PROBLEM_STATE_L1D_PENALTY_CYCLES),
380 CPUMF_EVENT_PTR(cf_fvn1, L1D_DIR_WRITES),
381 CPUMF_EVENT_PTR(cf_fvn1, L1D_PENALTY_CYCLES),
386 CPUMF_EVENT_PTR(cf_fvn3, CPU_CYCLES),
387 CPUMF_EVENT_PTR(cf_fvn3, INSTRUCTIONS),
388 CPUMF_EVENT_PTR(cf_fvn3, L1I_DIR_WRITES),
389 CPUMF_EVENT_PTR(cf_fvn3, L1I_PENALTY_CYCLES),
390 CPUMF_EVENT_PTR(cf_fvn3, PROBLEM_STATE_CPU_CYCLES),
391 CPUMF_EVENT_PTR(cf_fvn3, PROBLEM_STATE_INSTRUCTIONS),
392 CPUMF_EVENT_PTR(cf_fvn3, L1D_DIR_WRITES),
393 CPUMF_EVENT_PTR(cf_fvn3, L1D_PENALTY_CYCLES),
398 CPUMF_EVENT_PTR(cf_svn_12345, PRNG_FUNCTIONS),
399 CPUMF_EVENT_PTR(cf_svn_12345, PRNG_CYCLES),
400 CPUMF_EVENT_PTR(cf_svn_12345, PRNG_BLOCKED_FUNCTIONS),
401 CPUMF_EVENT_PTR(cf_svn_12345, PRNG_BLOCKED_CYCLES),
402 CPUMF_EVENT_PTR(cf_svn_12345, SHA_FUNCTIONS),
403 CPUMF_EVENT_PTR(cf_svn_12345, SHA_CYCLES),
404 CPUMF_EVENT_PTR(cf_svn_12345, SHA_BLOCKED_FUNCTIONS),
405 CPUMF_EVENT_PTR(cf_svn_12345, SHA_BLOCKED_CYCLES),
406 CPUMF_EVENT_PTR(cf_svn_12345, DEA_FUNCTIONS),
407 CPUMF_EVENT_PTR(cf_svn_12345, DEA_CYCLES),
408 CPUMF_EVENT_PTR(cf_svn_12345, DEA_BLOCKED_FUNCTIONS),
409 CPUMF_EVENT_PTR(cf_svn_12345, DEA_BLOCKED_CYCLES),
410 CPUMF_EVENT_PTR(cf_svn_12345, AES_FUNCTIONS),
411 CPUMF_EVENT_PTR(cf_svn_12345, AES_CYCLES),
412 CPUMF_EVENT_PTR(cf_svn_12345, AES_BLOCKED_FUNCTIONS),
413 CPUMF_EVENT_PTR(cf_svn_12345, AES_BLOCKED_CYCLES),
418 CPUMF_EVENT_PTR(cf_svn_12345, PRNG_FUNCTIONS),
419 CPUMF_EVENT_PTR(cf_svn_12345, PRNG_CYCLES),
420 CPUMF_EVENT_PTR(cf_svn_12345, PRNG_BLOCKED_FUNCTIONS),
421 CPUMF_EVENT_PTR(cf_svn_12345, PRNG_BLOCKED_CYCLES),
422 CPUMF_EVENT_PTR(cf_svn_12345, SHA_FUNCTIONS),
423 CPUMF_EVENT_PTR(cf_svn_12345, SHA_CYCLES),
424 CPUMF_EVENT_PTR(cf_svn_12345, SHA_BLOCKED_FUNCTIONS),
425 CPUMF_EVENT_PTR(cf_svn_12345, SHA_BLOCKED_CYCLES),
426 CPUMF_EVENT_PTR(cf_svn_12345, DEA_FUNCTIONS),
427 CPUMF_EVENT_PTR(cf_svn_12345, DEA_CYCLES),
428 CPUMF_EVENT_PTR(cf_svn_12345, DEA_BLOCKED_FUNCTIONS),
429 CPUMF_EVENT_PTR(cf_svn_12345, DEA_BLOCKED_CYCLES),
430 CPUMF_EVENT_PTR(cf_svn_12345, AES_FUNCTIONS),
431 CPUMF_EVENT_PTR(cf_svn_12345, AES_CYCLES),
432 CPUMF_EVENT_PTR(cf_svn_12345, AES_BLOCKED_FUNCTIONS),
433 CPUMF_EVENT_PTR(cf_svn_12345, AES_BLOCKED_CYCLES),
434 CPUMF_EVENT_PTR(cf_svn_6, ECC_FUNCTION_COUNT),
435 CPUMF_EVENT_PTR(cf_svn_6, ECC_CYCLES_COUNT),
436 CPUMF_EVENT_PTR(cf_svn_6, ECC_BLOCKED_FUNCTION_COUNT),
437 CPUMF_EVENT_PTR(cf_svn_6, ECC_BLOCKED_CYCLES_COUNT),
442 CPUMF_EVENT_PTR(cf_z10, L1I_L2_SOURCED_WRITES),
443 CPUMF_EVENT_PTR(cf_z10, L1D_L2_SOURCED_WRITES),
444 CPUMF_EVENT_PTR(cf_z10, L1I_L3_LOCAL_WRITES),
445 CPUMF_EVENT_PTR(cf_z10, L1D_L3_LOCAL_WRITES),
446 CPUMF_EVENT_PTR(cf_z10, L1I_L3_REMOTE_WRITES),
447 CPUMF_EVENT_PTR(cf_z10, L1D_L3_REMOTE_WRITES),
448 CPUMF_EVENT_PTR(cf_z10, L1D_LMEM_SOURCED_WRITES),
449 CPUMF_EVENT_PTR(cf_z10, L1I_LMEM_SOURCED_WRITES),
450 CPUMF_EVENT_PTR(cf_z10, L1D_RO_EXCL_WRITES),
451 CPUMF_EVENT_PTR(cf_z10, L1I_CACHELINE_INVALIDATES),
452 CPUMF_EVENT_PTR(cf_z10, ITLB1_WRITES),
453 CPUMF_EVENT_PTR(cf_z10, DTLB1_WRITES),
454 CPUMF_EVENT_PTR(cf_z10, TLB2_PTE_WRITES),
455 CPUMF_EVENT_PTR(cf_z10, TLB2_CRSTE_WRITES),
456 CPUMF_EVENT_PTR(cf_z10, TLB2_CRSTE_HPAGE_WRITES),
457 CPUMF_EVENT_PTR(cf_z10, ITLB1_MISSES),
458 CPUMF_EVENT_PTR(cf_z10, DTLB1_MISSES),
459 CPUMF_EVENT_PTR(cf_z10, L2C_STORES_SENT),
464 CPUMF_EVENT_PTR(cf_z196, L1D_L2_SOURCED_WRITES),
465 CPUMF_EVENT_PTR(cf_z196, L1I_L2_SOURCED_WRITES),
466 CPUMF_EVENT_PTR(cf_z196, DTLB1_MISSES),
467 CPUMF_EVENT_PTR(cf_z196, ITLB1_MISSES),
468 CPUMF_EVENT_PTR(cf_z196, L2C_STORES_SENT),
469 CPUMF_EVENT_PTR(cf_z196, L1D_OFFBOOK_L3_SOURCED_WRITES),
470 CPUMF_EVENT_PTR(cf_z196, L1D_ONBOOK_L4_SOURCED_WRITES),
471 CPUMF_EVENT_PTR(cf_z196, L1I_ONBOOK_L4_SOURCED_WRITES),
472 CPUMF_EVENT_PTR(cf_z196, L1D_RO_EXCL_WRITES),
473 CPUMF_EVENT_PTR(cf_z196, L1D_OFFBOOK_L4_SOURCED_WRITES),
474 CPUMF_EVENT_PTR(cf_z196, L1I_OFFBOOK_L4_SOURCED_WRITES),
475 CPUMF_EVENT_PTR(cf_z196, DTLB1_HPAGE_WRITES),
476 CPUMF_EVENT_PTR(cf_z196, L1D_LMEM_SOURCED_WRITES),
477 CPUMF_EVENT_PTR(cf_z196, L1I_LMEM_SOURCED_WRITES),
478 CPUMF_EVENT_PTR(cf_z196, L1I_OFFBOOK_L3_SOURCED_WRITES),
479 CPUMF_EVENT_PTR(cf_z196, DTLB1_WRITES),
480 CPUMF_EVENT_PTR(cf_z196, ITLB1_WRITES),
481 CPUMF_EVENT_PTR(cf_z196, TLB2_PTE_WRITES),
482 CPUMF_EVENT_PTR(cf_z196, TLB2_CRSTE_HPAGE_WRITES),
483 CPUMF_EVENT_PTR(cf_z196, TLB2_CRSTE_WRITES),
484 CPUMF_EVENT_PTR(cf_z196, L1D_ONCHIP_L3_SOURCED_WRITES),
485 CPUMF_EVENT_PTR(cf_z196, L1D_OFFCHIP_L3_SOURCED_WRITES),
486 CPUMF_EVENT_PTR(cf_z196, L1I_ONCHIP_L3_SOURCED_WRITES),
487 CPUMF_EVENT_PTR(cf_z196, L1I_OFFCHIP_L3_SOURCED_WRITES),
492 CPUMF_EVENT_PTR(cf_zec12, DTLB1_MISSES),
493 CPUMF_EVENT_PTR(cf_zec12, ITLB1_MISSES),
494 CPUMF_EVENT_PTR(cf_zec12, L1D_L2I_SOURCED_WRITES),
495 CPUMF_EVENT_PTR(cf_zec12, L1I_L2I_SOURCED_WRITES),
496 CPUMF_EVENT_PTR(cf_zec12, L1D_L2D_SOURCED_WRITES),
497 CPUMF_EVENT_PTR(cf_zec12, DTLB1_WRITES),
498 CPUMF_EVENT_PTR(cf_zec12, L1D_LMEM_SOURCED_WRITES),
499 CPUMF_EVENT_PTR(cf_zec12, L1I_LMEM_SOURCED_WRITES),
500 CPUMF_EVENT_PTR(cf_zec12, L1D_RO_EXCL_WRITES),
501 CPUMF_EVENT_PTR(cf_zec12, DTLB1_HPAGE_WRITES),
502 CPUMF_EVENT_PTR(cf_zec12, ITLB1_WRITES),
503 CPUMF_EVENT_PTR(cf_zec12, TLB2_PTE_WRITES),
504 CPUMF_EVENT_PTR(cf_zec12, TLB2_CRSTE_HPAGE_WRITES),
505 CPUMF_EVENT_PTR(cf_zec12, TLB2_CRSTE_WRITES),
506 CPUMF_EVENT_PTR(cf_zec12, L1D_ONCHIP_L3_SOURCED_WRITES),
507 CPUMF_EVENT_PTR(cf_zec12, L1D_OFFCHIP_L3_SOURCED_WRITES),
508 CPUMF_EVENT_PTR(cf_zec12, L1D_OFFBOOK_L3_SOURCED_WRITES),
509 CPUMF_EVENT_PTR(cf_zec12, L1D_ONBOOK_L4_SOURCED_WRITES),
510 CPUMF_EVENT_PTR(cf_zec12, L1D_OFFBOOK_L4_SOURCED_WRITES),
511 CPUMF_EVENT_PTR(cf_zec12, TX_NC_TEND),
512 CPUMF_EVENT_PTR(cf_zec12, L1D_ONCHIP_L3_SOURCED_WRITES_IV),
513 CPUMF_EVENT_PTR(cf_zec12, L1D_OFFCHIP_L3_SOURCED_WRITES_IV),
514 CPUMF_EVENT_PTR(cf_zec12, L1D_OFFBOOK_L3_SOURCED_WRITES_IV),
515 CPUMF_EVENT_PTR(cf_zec12, L1I_ONCHIP_L3_SOURCED_WRITES),
516 CPUMF_EVENT_PTR(cf_zec12, L1I_OFFCHIP_L3_SOURCED_WRITES),
517 CPUMF_EVENT_PTR(cf_zec12, L1I_OFFBOOK_L3_SOURCED_WRITES),
518 CPUMF_EVENT_PTR(cf_zec12, L1I_ONBOOK_L4_SOURCED_WRITES),
519 CPUMF_EVENT_PTR(cf_zec12, L1I_OFFBOOK_L4_SOURCED_WRITES),
520 CPUMF_EVENT_PTR(cf_zec12, TX_C_TEND),
521 CPUMF_EVENT_PTR(cf_zec12, L1I_ONCHIP_L3_SOURCED_WRITES_IV),
522 CPUMF_EVENT_PTR(cf_zec12, L1I_OFFCHIP_L3_SOURCED_WRITES_IV),
523 CPUMF_EVENT_PTR(cf_zec12, L1I_OFFBOOK_L3_SOURCED_WRITES_IV),
524 CPUMF_EVENT_PTR(cf_zec12, TX_NC_TABORT),
525 CPUMF_EVENT_PTR(cf_zec12, TX_C_TABORT_NO_SPECIAL),
526 CPUMF_EVENT_PTR(cf_zec12, TX_C_TABORT_SPECIAL),
531 CPUMF_EVENT_PTR(cf_z13, L1D_RO_EXCL_WRITES),
532 CPUMF_EVENT_PTR(cf_z13, DTLB1_WRITES),
533 CPUMF_EVENT_PTR(cf_z13, DTLB1_MISSES),
534 CPUMF_EVENT_PTR(cf_z13, DTLB1_HPAGE_WRITES),
535 CPUMF_EVENT_PTR(cf_z13, DTLB1_GPAGE_WRITES),
536 CPUMF_EVENT_PTR(cf_z13, L1D_L2D_SOURCED_WRITES),
537 CPUMF_EVENT_PTR(cf_z13, ITLB1_WRITES),
538 CPUMF_EVENT_PTR(cf_z13, ITLB1_MISSES),
539 CPUMF_EVENT_PTR(cf_z13, L1I_L2I_SOURCED_WRITES),
540 CPUMF_EVENT_PTR(cf_z13, TLB2_PTE_WRITES),
541 CPUMF_EVENT_PTR(cf_z13, TLB2_CRSTE_HPAGE_WRITES),
542 CPUMF_EVENT_PTR(cf_z13, TLB2_CRSTE_WRITES),
543 CPUMF_EVENT_PTR(cf_z13, TX_C_TEND),
544 CPUMF_EVENT_PTR(cf_z13, TX_NC_TEND),
545 CPUMF_EVENT_PTR(cf_z13, L1C_TLB1_MISSES),
546 CPUMF_EVENT_PTR(cf_z13, L1D_ONCHIP_L3_SOURCED_WRITES),
547 CPUMF_EVENT_PTR(cf_z13, L1D_ONCHIP_L3_SOURCED_WRITES_IV),
548 CPUMF_EVENT_PTR(cf_z13, L1D_ONNODE_L4_SOURCED_WRITES),
549 CPUMF_EVENT_PTR(cf_z13, L1D_ONNODE_L3_SOURCED_WRITES_IV),
550 CPUMF_EVENT_PTR(cf_z13, L1D_ONNODE_L3_SOURCED_WRITES),
551 CPUMF_EVENT_PTR(cf_z13, L1D_ONDRAWER_L4_SOURCED_WRITES),
552 CPUMF_EVENT_PTR(cf_z13, L1D_ONDRAWER_L3_SOURCED_WRITES_IV),
553 CPUMF_EVENT_PTR(cf_z13, L1D_ONDRAWER_L3_SOURCED_WRITES),
554 CPUMF_EVENT_PTR(cf_z13, L1D_OFFDRAWER_SCOL_L4_SOURCED_WRITES),
555 CPUMF_EVENT_PTR(cf_z13, L1D_OFFDRAWER_SCOL_L3_SOURCED_WRITES_IV),
556 CPUMF_EVENT_PTR(cf_z13, L1D_OFFDRAWER_SCOL_L3_SOURCED_WRITES),
557 CPUMF_EVENT_PTR(cf_z13, L1D_OFFDRAWER_FCOL_L4_SOURCED_WRITES),
558 CPUMF_EVENT_PTR(cf_z13, L1D_OFFDRAWER_FCOL_L3_SOURCED_WRITES_IV),
559 CPUMF_EVENT_PTR(cf_z13, L1D_OFFDRAWER_FCOL_L3_SOURCED_WRITES),
560 CPUMF_EVENT_PTR(cf_z13, L1D_ONNODE_MEM_SOURCED_WRITES),
561 CPUMF_EVENT_PTR(cf_z13, L1D_ONDRAWER_MEM_SOURCED_WRITES),
562 CPUMF_EVENT_PTR(cf_z13, L1D_OFFDRAWER_MEM_SOURCED_WRITES),
563 CPUMF_EVENT_PTR(cf_z13, L1D_ONCHIP_MEM_SOURCED_WRITES),
564 CPUMF_EVENT_PTR(cf_z13, L1I_ONCHIP_L3_SOURCED_WRITES),
565 CPUMF_EVENT_PTR(cf_z13, L1I_ONCHIP_L3_SOURCED_WRITES_IV),
566 CPUMF_EVENT_PTR(cf_z13, L1I_ONNODE_L4_SOURCED_WRITES),
567 CPUMF_EVENT_PTR(cf_z13, L1I_ONNODE_L3_SOURCED_WRITES_IV),
568 CPUMF_EVENT_PTR(cf_z13, L1I_ONNODE_L3_SOURCED_WRITES),
569 CPUMF_EVENT_PTR(cf_z13, L1I_ONDRAWER_L4_SOURCED_WRITES),
570 CPUMF_EVENT_PTR(cf_z13, L1I_ONDRAWER_L3_SOURCED_WRITES_IV),
571 CPUMF_EVENT_PTR(cf_z13, L1I_ONDRAWER_L3_SOURCED_WRITES),
572 CPUMF_EVENT_PTR(cf_z13, L1I_OFFDRAWER_SCOL_L4_SOURCED_WRITES),
573 CPUMF_EVENT_PTR(cf_z13, L1I_OFFDRAWER_SCOL_L3_SOURCED_WRITES_IV),
574 CPUMF_EVENT_PTR(cf_z13, L1I_OFFDRAWER_SCOL_L3_SOURCED_WRITES),
575 CPUMF_EVENT_PTR(cf_z13, L1I_OFFDRAWER_FCOL_L4_SOURCED_WRITES),
576 CPUMF_EVENT_PTR(cf_z13, L1I_OFFDRAWER_FCOL_L3_SOURCED_WRITES_IV),
577 CPUMF_EVENT_PTR(cf_z13, L1I_OFFDRAWER_FCOL_L3_SOURCED_WRITES),
578 CPUMF_EVENT_PTR(cf_z13, L1I_ONNODE_MEM_SOURCED_WRITES),
579 CPUMF_EVENT_PTR(cf_z13, L1I_ONDRAWER_MEM_SOURCED_WRITES),
580 CPUMF_EVENT_PTR(cf_z13, L1I_OFFDRAWER_MEM_SOURCED_WRITES),
581 CPUMF_EVENT_PTR(cf_z13, L1I_ONCHIP_MEM_SOURCED_WRITES),
582 CPUMF_EVENT_PTR(cf_z13, TX_NC_TABORT),
583 CPUMF_EVENT_PTR(cf_z13, TX_C_TABORT_NO_SPECIAL),
584 CPUMF_EVENT_PTR(cf_z13, TX_C_TABORT_SPECIAL),
585 CPUMF_EVENT_PTR(cf_z13, MT_DIAG_CYCLES_ONE_THR_ACTIVE),
586 CPUMF_EVENT_PTR(cf_z13, MT_DIAG_CYCLES_TWO_THR_ACTIVE),
591 CPUMF_EVENT_PTR(cf_z14, L1D_RO_EXCL_WRITES),
592 CPUMF_EVENT_PTR(cf_z14, DTLB2_WRITES),
593 CPUMF_EVENT_PTR(cf_z14, DTLB2_MISSES),
594 CPUMF_EVENT_PTR(cf_z14, DTLB2_HPAGE_WRITES),
595 CPUMF_EVENT_PTR(cf_z14, DTLB2_GPAGE_WRITES),
596 CPUMF_EVENT_PTR(cf_z14, L1D_L2D_SOURCED_WRITES),
597 CPUMF_EVENT_PTR(cf_z14, ITLB2_WRITES),
598 CPUMF_EVENT_PTR(cf_z14, ITLB2_MISSES),
599 CPUMF_EVENT_PTR(cf_z14, L1I_L2I_SOURCED_WRITES),
600 CPUMF_EVENT_PTR(cf_z14, TLB2_PTE_WRITES),
601 CPUMF_EVENT_PTR(cf_z14, TLB2_CRSTE_WRITES),
602 CPUMF_EVENT_PTR(cf_z14, TLB2_ENGINES_BUSY),
603 CPUMF_EVENT_PTR(cf_z14, TX_C_TEND),
604 CPUMF_EVENT_PTR(cf_z14, TX_NC_TEND),
605 CPUMF_EVENT_PTR(cf_z14, L1C_TLB2_MISSES),
606 CPUMF_EVENT_PTR(cf_z14, L1D_ONCHIP_L3_SOURCED_WRITES),
607 CPUMF_EVENT_PTR(cf_z14, L1D_ONCHIP_MEMORY_SOURCED_WRITES),
608 CPUMF_EVENT_PTR(cf_z14, L1D_ONCHIP_L3_SOURCED_WRITES_IV),
609 CPUMF_EVENT_PTR(cf_z14, L1D_ONCLUSTER_L3_SOURCED_WRITES),
610 CPUMF_EVENT_PTR(cf_z14, L1D_ONCLUSTER_MEMORY_SOURCED_WRITES),
611 CPUMF_EVENT_PTR(cf_z14, L1D_ONCLUSTER_L3_SOURCED_WRITES_IV),
612 CPUMF_EVENT_PTR(cf_z14, L1D_OFFCLUSTER_L3_SOURCED_WRITES),
613 CPUMF_EVENT_PTR(cf_z14, L1D_OFFCLUSTER_MEMORY_SOURCED_WRITES),
614 CPUMF_EVENT_PTR(cf_z14, L1D_OFFCLUSTER_L3_SOURCED_WRITES_IV),
615 CPUMF_EVENT_PTR(cf_z14, L1D_OFFDRAWER_L3_SOURCED_WRITES),
616 CPUMF_EVENT_PTR(cf_z14, L1D_OFFDRAWER_MEMORY_SOURCED_WRITES),
617 CPUMF_EVENT_PTR(cf_z14, L1D_OFFDRAWER_L3_SOURCED_WRITES_IV),
618 CPUMF_EVENT_PTR(cf_z14, L1D_ONDRAWER_L4_SOURCED_WRITES),
619 CPUMF_EVENT_PTR(cf_z14, L1D_OFFDRAWER_L4_SOURCED_WRITES),
620 CPUMF_EVENT_PTR(cf_z14, L1D_ONCHIP_L3_SOURCED_WRITES_RO),
621 CPUMF_EVENT_PTR(cf_z14, L1I_ONCHIP_L3_SOURCED_WRITES),
622 CPUMF_EVENT_PTR(cf_z14, L1I_ONCHIP_MEMORY_SOURCED_WRITES),
623 CPUMF_EVENT_PTR(cf_z14, L1I_ONCHIP_L3_SOURCED_WRITES_IV),
624 CPUMF_EVENT_PTR(cf_z14, L1I_ONCLUSTER_L3_SOURCED_WRITES),
625 CPUMF_EVENT_PTR(cf_z14, L1I_ONCLUSTER_MEMORY_SOURCED_WRITES),
626 CPUMF_EVENT_PTR(cf_z14, L1I_ONCLUSTER_L3_SOURCED_WRITES_IV),
627 CPUMF_EVENT_PTR(cf_z14, L1I_OFFCLUSTER_L3_SOURCED_WRITES),
628 CPUMF_EVENT_PTR(cf_z14, L1I_OFFCLUSTER_MEMORY_SOURCED_WRITES),
629 CPUMF_EVENT_PTR(cf_z14, L1I_OFFCLUSTER_L3_SOURCED_WRITES_IV),
630 CPUMF_EVENT_PTR(cf_z14, L1I_OFFDRAWER_L3_SOURCED_WRITES),
631 CPUMF_EVENT_PTR(cf_z14, L1I_OFFDRAWER_MEMORY_SOURCED_WRITES),
632 CPUMF_EVENT_PTR(cf_z14, L1I_OFFDRAWER_L3_SOURCED_WRITES_IV),
633 CPUMF_EVENT_PTR(cf_z14, L1I_ONDRAWER_L4_SOURCED_WRITES),
634 CPUMF_EVENT_PTR(cf_z14, L1I_OFFDRAWER_L4_SOURCED_WRITES),
635 CPUMF_EVENT_PTR(cf_z14, BCD_DFP_EXECUTION_SLOTS),
636 CPUMF_EVENT_PTR(cf_z14, VX_BCD_EXECUTION_SLOTS),
637 CPUMF_EVENT_PTR(cf_z14, DECIMAL_INSTRUCTIONS),
638 CPUMF_EVENT_PTR(cf_z14, LAST_HOST_TRANSLATIONS),
639 CPUMF_EVENT_PTR(cf_z14, TX_NC_TABORT),
640 CPUMF_EVENT_PTR(cf_z14, TX_C_TABORT_NO_SPECIAL),
641 CPUMF_EVENT_PTR(cf_z14, TX_C_TABORT_SPECIAL),
642 CPUMF_EVENT_PTR(cf_z14, MT_DIAG_CYCLES_ONE_THR_ACTIVE),
643 CPUMF_EVENT_PTR(cf_z14, MT_DIAG_CYCLES_TWO_THR_ACTIVE),
648 CPUMF_EVENT_PTR(cf_z15, L1D_RO_EXCL_WRITES),
649 CPUMF_EVENT_PTR(cf_z15, DTLB2_WRITES),
650 CPUMF_EVENT_PTR(cf_z15, DTLB2_MISSES),
651 CPUMF_EVENT_PTR(cf_z15, DTLB2_HPAGE_WRITES),
652 CPUMF_EVENT_PTR(cf_z15, DTLB2_GPAGE_WRITES),
653 CPUMF_EVENT_PTR(cf_z15, L1D_L2D_SOURCED_WRITES),
654 CPUMF_EVENT_PTR(cf_z15, ITLB2_WRITES),
655 CPUMF_EVENT_PTR(cf_z15, ITLB2_MISSES),
656 CPUMF_EVENT_PTR(cf_z15, L1I_L2I_SOURCED_WRITES),
657 CPUMF_EVENT_PTR(cf_z15, TLB2_PTE_WRITES),
658 CPUMF_EVENT_PTR(cf_z15, TLB2_CRSTE_WRITES),
659 CPUMF_EVENT_PTR(cf_z15, TLB2_ENGINES_BUSY),
660 CPUMF_EVENT_PTR(cf_z15, TX_C_TEND),
661 CPUMF_EVENT_PTR(cf_z15, TX_NC_TEND),
662 CPUMF_EVENT_PTR(cf_z15, L1C_TLB2_MISSES),
663 CPUMF_EVENT_PTR(cf_z15, L1D_ONCHIP_L3_SOURCED_WRITES),
664 CPUMF_EVENT_PTR(cf_z15, L1D_ONCHIP_MEMORY_SOURCED_WRITES),
665 CPUMF_EVENT_PTR(cf_z15, L1D_ONCHIP_L3_SOURCED_WRITES_IV),
666 CPUMF_EVENT_PTR(cf_z15, L1D_ONCLUSTER_L3_SOURCED_WRITES),
667 CPUMF_EVENT_PTR(cf_z15, L1D_ONCLUSTER_MEMORY_SOURCED_WRITES),
668 CPUMF_EVENT_PTR(cf_z15, L1D_ONCLUSTER_L3_SOURCED_WRITES_IV),
669 CPUMF_EVENT_PTR(cf_z15, L1D_OFFCLUSTER_L3_SOURCED_WRITES),
670 CPUMF_EVENT_PTR(cf_z15, L1D_OFFCLUSTER_MEMORY_SOURCED_WRITES),
671 CPUMF_EVENT_PTR(cf_z15, L1D_OFFCLUSTER_L3_SOURCED_WRITES_IV),
672 CPUMF_EVENT_PTR(cf_z15, L1D_OFFDRAWER_L3_SOURCED_WRITES),
673 CPUMF_EVENT_PTR(cf_z15, L1D_OFFDRAWER_MEMORY_SOURCED_WRITES),
674 CPUMF_EVENT_PTR(cf_z15, L1D_OFFDRAWER_L3_SOURCED_WRITES_IV),
675 CPUMF_EVENT_PTR(cf_z15, L1D_ONDRAWER_L4_SOURCED_WRITES),
676 CPUMF_EVENT_PTR(cf_z15, L1D_OFFDRAWER_L4_SOURCED_WRITES),
677 CPUMF_EVENT_PTR(cf_z15, L1D_ONCHIP_L3_SOURCED_WRITES_RO),
678 CPUMF_EVENT_PTR(cf_z15, L1I_ONCHIP_L3_SOURCED_WRITES),
679 CPUMF_EVENT_PTR(cf_z15, L1I_ONCHIP_MEMORY_SOURCED_WRITES),
680 CPUMF_EVENT_PTR(cf_z15, L1I_ONCHIP_L3_SOURCED_WRITES_IV),
681 CPUMF_EVENT_PTR(cf_z15, L1I_ONCLUSTER_L3_SOURCED_WRITES),
682 CPUMF_EVENT_PTR(cf_z15, L1I_ONCLUSTER_MEMORY_SOURCED_WRITES),
683 CPUMF_EVENT_PTR(cf_z15, L1I_ONCLUSTER_L3_SOURCED_WRITES_IV),
684 CPUMF_EVENT_PTR(cf_z15, L1I_OFFCLUSTER_L3_SOURCED_WRITES),
685 CPUMF_EVENT_PTR(cf_z15, L1I_OFFCLUSTER_MEMORY_SOURCED_WRITES),
686 CPUMF_EVENT_PTR(cf_z15, L1I_OFFCLUSTER_L3_SOURCED_WRITES_IV),
687 CPUMF_EVENT_PTR(cf_z15, L1I_OFFDRAWER_L3_SOURCED_WRITES),
688 CPUMF_EVENT_PTR(cf_z15, L1I_OFFDRAWER_MEMORY_SOURCED_WRITES),
689 CPUMF_EVENT_PTR(cf_z15, L1I_OFFDRAWER_L3_SOURCED_WRITES_IV),
690 CPUMF_EVENT_PTR(cf_z15, L1I_ONDRAWER_L4_SOURCED_WRITES),
691 CPUMF_EVENT_PTR(cf_z15, L1I_OFFDRAWER_L4_SOURCED_WRITES),
692 CPUMF_EVENT_PTR(cf_z15, BCD_DFP_EXECUTION_SLOTS),
693 CPUMF_EVENT_PTR(cf_z15, VX_BCD_EXECUTION_SLOTS),
694 CPUMF_EVENT_PTR(cf_z15, DECIMAL_INSTRUCTIONS),
695 CPUMF_EVENT_PTR(cf_z15, LAST_HOST_TRANSLATIONS),
696 CPUMF_EVENT_PTR(cf_z15, TX_NC_TABORT),
697 CPUMF_EVENT_PTR(cf_z15, TX_C_TABORT_NO_SPECIAL),
698 CPUMF_EVENT_PTR(cf_z15, TX_C_TABORT_SPECIAL),
699 CPUMF_EVENT_PTR(cf_z15, DFLT_ACCESS),
700 CPUMF_EVENT_PTR(cf_z15, DFLT_CYCLES),
701 CPUMF_EVENT_PTR(cf_z15, DFLT_CC),
702 CPUMF_EVENT_PTR(cf_z15, DFLT_CCFINISH),
703 CPUMF_EVENT_PTR(cf_z15, MT_DIAG_CYCLES_ONE_THR_ACTIVE),
704 CPUMF_EVENT_PTR(cf_z15, MT_DIAG_CYCLES_TWO_THR_ACTIVE),
709 CPUMF_EVENT_PTR(cf_z16, L1D_RO_EXCL_WRITES),
710 CPUMF_EVENT_PTR(cf_z16, DTLB2_WRITES),
711 CPUMF_EVENT_PTR(cf_z16, DTLB2_MISSES),
712 CPUMF_EVENT_PTR(cf_z16, CRSTE_1MB_WRITES),
713 CPUMF_EVENT_PTR(cf_z16, DTLB2_GPAGE_WRITES),
714 CPUMF_EVENT_PTR(cf_z16, ITLB2_WRITES),
715 CPUMF_EVENT_PTR(cf_z16, ITLB2_MISSES),
716 CPUMF_EVENT_PTR(cf_z16, TLB2_PTE_WRITES),
717 CPUMF_EVENT_PTR(cf_z16, TLB2_CRSTE_WRITES),
718 CPUMF_EVENT_PTR(cf_z16, TLB2_ENGINES_BUSY),
719 CPUMF_EVENT_PTR(cf_z16, TX_C_TEND),
720 CPUMF_EVENT_PTR(cf_z16, TX_NC_TEND),
721 CPUMF_EVENT_PTR(cf_z16, L1C_TLB2_MISSES),
722 CPUMF_EVENT_PTR(cf_z16, DCW_REQ),
723 CPUMF_EVENT_PTR(cf_z16, DCW_REQ_IV),
724 CPUMF_EVENT_PTR(cf_z16, DCW_REQ_CHIP_HIT),
725 CPUMF_EVENT_PTR(cf_z16, DCW_REQ_DRAWER_HIT),
726 CPUMF_EVENT_PTR(cf_z16, DCW_ON_CHIP),
727 CPUMF_EVENT_PTR(cf_z16, DCW_ON_CHIP_IV),
728 CPUMF_EVENT_PTR(cf_z16, DCW_ON_CHIP_CHIP_HIT),
729 CPUMF_EVENT_PTR(cf_z16, DCW_ON_CHIP_DRAWER_HIT),
730 CPUMF_EVENT_PTR(cf_z16, DCW_ON_MODULE),
731 CPUMF_EVENT_PTR(cf_z16, DCW_ON_DRAWER),
732 CPUMF_EVENT_PTR(cf_z16, DCW_OFF_DRAWER),
733 CPUMF_EVENT_PTR(cf_z16, DCW_ON_CHIP_MEMORY),
734 CPUMF_EVENT_PTR(cf_z16, DCW_ON_MODULE_MEMORY),
735 CPUMF_EVENT_PTR(cf_z16, DCW_ON_DRAWER_MEMORY),
736 CPUMF_EVENT_PTR(cf_z16, DCW_OFF_DRAWER_MEMORY),
737 CPUMF_EVENT_PTR(cf_z16, IDCW_ON_MODULE_IV),
738 CPUMF_EVENT_PTR(cf_z16, IDCW_ON_MODULE_CHIP_HIT),
739 CPUMF_EVENT_PTR(cf_z16, IDCW_ON_MODULE_DRAWER_HIT),
740 CPUMF_EVENT_PTR(cf_z16, IDCW_ON_DRAWER_IV),
741 CPUMF_EVENT_PTR(cf_z16, IDCW_ON_DRAWER_CHIP_HIT),
742 CPUMF_EVENT_PTR(cf_z16, IDCW_ON_DRAWER_DRAWER_HIT),
743 CPUMF_EVENT_PTR(cf_z16, IDCW_OFF_DRAWER_IV),
744 CPUMF_EVENT_PTR(cf_z16, IDCW_OFF_DRAWER_CHIP_HIT),
745 CPUMF_EVENT_PTR(cf_z16, IDCW_OFF_DRAWER_DRAWER_HIT),
746 CPUMF_EVENT_PTR(cf_z16, ICW_REQ),
747 CPUMF_EVENT_PTR(cf_z16, ICW_REQ_IV),
748 CPUMF_EVENT_PTR(cf_z16, ICW_REQ_CHIP_HIT),
749 CPUMF_EVENT_PTR(cf_z16, ICW_REQ_DRAWER_HIT),
750 CPUMF_EVENT_PTR(cf_z16, ICW_ON_CHIP),
751 CPUMF_EVENT_PTR(cf_z16, ICW_ON_CHIP_IV),
752 CPUMF_EVENT_PTR(cf_z16, ICW_ON_CHIP_CHIP_HIT),
753 CPUMF_EVENT_PTR(cf_z16, ICW_ON_CHIP_DRAWER_HIT),
754 CPUMF_EVENT_PTR(cf_z16, ICW_ON_MODULE),
755 CPUMF_EVENT_PTR(cf_z16, ICW_ON_DRAWER),
756 CPUMF_EVENT_PTR(cf_z16, ICW_OFF_DRAWER),
757 CPUMF_EVENT_PTR(cf_z16, ICW_ON_CHIP_MEMORY),
758 CPUMF_EVENT_PTR(cf_z16, ICW_ON_MODULE_MEMORY),
759 CPUMF_EVENT_PTR(cf_z16, ICW_ON_DRAWER_MEMORY),
760 CPUMF_EVENT_PTR(cf_z16, ICW_OFF_DRAWER_MEMORY),
761 CPUMF_EVENT_PTR(cf_z16, BCD_DFP_EXECUTION_SLOTS),
762 CPUMF_EVENT_PTR(cf_z16, VX_BCD_EXECUTION_SLOTS),
763 CPUMF_EVENT_PTR(cf_z16, DECIMAL_INSTRUCTIONS),
764 CPUMF_EVENT_PTR(cf_z16, LAST_HOST_TRANSLATIONS),
765 CPUMF_EVENT_PTR(cf_z16, TX_NC_TABORT),
766 CPUMF_EVENT_PTR(cf_z16, TX_C_TABORT_NO_SPECIAL),
767 CPUMF_EVENT_PTR(cf_z16, TX_C_TABORT_SPECIAL),
768 CPUMF_EVENT_PTR(cf_z16, DFLT_ACCESS),
769 CPUMF_EVENT_PTR(cf_z16, DFLT_CYCLES),
770 CPUMF_EVENT_PTR(cf_z16, SORTL),
771 CPUMF_EVENT_PTR(cf_z16, DFLT_CC),
772 CPUMF_EVENT_PTR(cf_z16, DFLT_CCFINISH),
773 CPUMF_EVENT_PTR(cf_z16, NNPA_INVOCATIONS),
774 CPUMF_EVENT_PTR(cf_z16, NNPA_COMPLETIONS),
775 CPUMF_EVENT_PTR(cf_z16, NNPA_WAIT_LOCK),
776 CPUMF_EVENT_PTR(cf_z16, NNPA_HOLD_LOCK),
777 CPUMF_EVENT_PTR(cf_z16, MT_DIAG_CYCLES_ONE_THR_ACTIVE),
778 CPUMF_EVENT_PTR(cf_z16, MT_DIAG_CYCLES_TWO_THR_ACTIVE),