Lines Matching refs:t0
20 li.d t0, CSR_DMW0_INIT # UC, PLV0, 0x8000 xxxx xxxx xxxx
21 csrwr t0, LOONGARCH_CSR_DMWIN0
22 li.d t0, CSR_DMW1_INIT # CA, PLV0, 0x9000 xxxx xxxx xxxx
23 csrwr t0, LOONGARCH_CSR_DMWIN1
25 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
26 csrwr t0, LOONGARCH_CSR_CRMD
27 li.w t0, 0x04 # PLV=0, PIE=1, PWE=0
28 csrwr t0, LOONGARCH_CSR_PRMD
29 li.w t0, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0
30 csrwr t0, LOONGARCH_CSR_EUEN
34 la.abs t0, 0f
35 jr t0
37 la t0, __bss_start # clear .bss
38 st.d zero, t0, 0
41 addi.d t0, t0, LONGSIZE
42 st.d zero, t0, 0
43 bne t0, t1, 1b
45 la t0, fw_arg0
46 st.d a0, t0, 0 # firmware arguments
47 la t0, fw_arg1
48 st.d a1, t0, 0
59 set_saved_sp sp, t0, t1
73 li.d t0, CSR_DMW0_INIT # UC, PLV0
74 csrwr t0, LOONGARCH_CSR_DMWIN0
75 li.d t0, CSR_DMW1_INIT # CA, PLV0
76 csrwr t0, LOONGARCH_CSR_DMWIN1
77 li.w t0, 0xb0 # PLV=0, IE=0, PG=1
78 csrwr t0, LOONGARCH_CSR_CRMD
79 li.w t0, 0x04 # PLV=0, PIE=1, PWE=0
80 csrwr t0, LOONGARCH_CSR_PRMD
81 li.w t0, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0
82 csrwr t0, LOONGARCH_CSR_EUEN
84 la.abs t0, cpuboot_data
85 ld.d sp, t0, CPU_BOOT_STACK
86 ld.d tp, t0, CPU_BOOT_TINFO
88 la.abs t0, 0f
89 jr t0