Lines Matching refs:x1
34 mov x3, x1
41 invalidate_icache_by_line x0, x1, x2, x3, \fixup
76 uaccess_ttbr0_disable x1, x2
97 invalidate_icache_by_line x0, x1, x2, x3
111 dcache_by_line_op civac, sy, x0, x1, x2, x3
130 dcache_by_line_op cvau, ish, x0, x1, x2, x3
147 tst x1, x3 // end cache line aligned?
148 bic x1, x1, x3
150 dc civac, x1 // clean & invalidate D / U line
158 cmp x0, x1
175 dcache_by_line_op cvac, sy, x0, x1, x2, x3
193 dcache_by_line_op cvap, sy, x0, x1, x2, x3
207 add x1, x0, x1
208 dcache_by_line_op civac, sy, x0, x1, x2, x3
220 add x1, x0, x1
232 add x1, x0, x1