18 	struct vgic_vmcr vmcr;  in access_gic_ctlr()  local
21 	vgic_get_vmcr(vcpu, &vmcr);  in access_gic_ctlr()
60 		vmcr.cbpr = (val & ICC_CTLR_EL1_CBPR_MASK) >> ICC_CTLR_EL1_CBPR_SHIFT;  in access_gic_ctlr()
61 		vmcr.eoim = (val & ICC_CTLR_EL1_EOImode_MASK) >> ICC_CTLR_EL1_EOImode_SHIFT;  in access_gic_ctlr()
62 		vgic_set_vmcr(vcpu, &vmcr);  in access_gic_ctlr()
78 		val |= (vmcr.cbpr << ICC_CTLR_EL1_CBPR_SHIFT) & ICC_CTLR_EL1_CBPR_MASK;  in access_gic_ctlr()
79 		val |= (vmcr.eoim << ICC_CTLR_EL1_EOImode_SHIFT) & ICC_CTLR_EL1_EOImode_MASK;  in access_gic_ctlr()
90 	struct vgic_vmcr vmcr;  in access_gic_pmr()  local
92 	vgic_get_vmcr(vcpu, &vmcr);  in access_gic_pmr()
94 		vmcr.pmr = (p->regval & ICC_PMR_EL1_MASK) >> ICC_PMR_EL1_SHIFT;  in access_gic_pmr()
95 		vgic_set_vmcr(vcpu, &vmcr);  in access_gic_pmr()
97 		p->regval = (vmcr.pmr << ICC_PMR_EL1_SHIFT) & ICC_PMR_EL1_MASK;  in access_gic_pmr()
106 	struct vgic_vmcr vmcr;  in access_gic_bpr0()  local
108 	vgic_get_vmcr(vcpu, &vmcr);  in access_gic_bpr0()
110 		vmcr.bpr = (p->regval & ICC_BPR0_EL1_MASK) >>  in access_gic_bpr0()
112 		vgic_set_vmcr(vcpu, &vmcr);  in access_gic_bpr0()
114 		p->regval = (vmcr.bpr << ICC_BPR0_EL1_SHIFT) &  in access_gic_bpr0()
124 	struct vgic_vmcr vmcr;  in access_gic_bpr1()  local
129 	vgic_get_vmcr(vcpu, &vmcr);  in access_gic_bpr1()
130 	if (!vmcr.cbpr) {  in access_gic_bpr1()
132 			vmcr.abpr = (p->regval & ICC_BPR1_EL1_MASK) >>  in access_gic_bpr1()
134 			vgic_set_vmcr(vcpu, &vmcr);  in access_gic_bpr1()
136 			p->regval = (vmcr.abpr << ICC_BPR1_EL1_SHIFT) &  in access_gic_bpr1()
141 			p->regval = min((vmcr.bpr + 1), 7U);  in access_gic_bpr1()
150 	struct vgic_vmcr vmcr;  in access_gic_grpen0()  local
152 	vgic_get_vmcr(vcpu, &vmcr);  in access_gic_grpen0()
154 		vmcr.grpen0 = (p->regval & ICC_IGRPEN0_EL1_MASK) >>  in access_gic_grpen0()
156 		vgic_set_vmcr(vcpu, &vmcr);  in access_gic_grpen0()
158 		p->regval = (vmcr.grpen0 << ICC_IGRPEN0_EL1_SHIFT) &  in access_gic_grpen0()
168 	struct vgic_vmcr vmcr;  in access_gic_grpen1()  local
170 	vgic_get_vmcr(vcpu, &vmcr);  in access_gic_grpen1()
172 		vmcr.grpen1 = (p->regval & ICC_IGRPEN1_EL1_MASK) >>  in access_gic_grpen1()
174 		vgic_set_vmcr(vcpu, &vmcr);  in access_gic_grpen1()
176 		p->regval = (vmcr.grpen1 << ICC_IGRPEN1_EL1_SHIFT) &  in access_gic_grpen1()