Lines Matching refs:CPG_MOD
180 clocks = <&cpg CPG_MOD R9A07G044_SSI0_PCLK2>,
181 <&cpg CPG_MOD R9A07G044_SSI0_PCLK_SFR>,
201 clocks = <&cpg CPG_MOD R9A07G044_SSI1_PCLK2>,
202 <&cpg CPG_MOD R9A07G044_SSI1_PCLK_SFR>,
222 clocks = <&cpg CPG_MOD R9A07G044_SSI2_PCLK2>,
223 <&cpg CPG_MOD R9A07G044_SSI2_PCLK_SFR>,
243 clocks = <&cpg CPG_MOD R9A07G044_SSI3_PCLK2>,
244 <&cpg CPG_MOD R9A07G044_SSI3_PCLK_SFR>,
262 clocks = <&cpg CPG_MOD R9A07G044_RSPI0_CLKB>;
278 clocks = <&cpg CPG_MOD R9A07G044_RSPI1_CLKB>;
294 clocks = <&cpg CPG_MOD R9A07G044_RSPI2_CLKB>;
314 clocks = <&cpg CPG_MOD R9A07G044_SCIF0_CLK_PCK>;
332 clocks = <&cpg CPG_MOD R9A07G044_SCIF1_CLK_PCK>;
350 clocks = <&cpg CPG_MOD R9A07G044_SCIF2_CLK_PCK>;
368 clocks = <&cpg CPG_MOD R9A07G044_SCIF3_CLK_PCK>;
386 clocks = <&cpg CPG_MOD R9A07G044_SCIF4_CLK_PCK>;
401 clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>;
416 clocks = <&cpg CPG_MOD R9A07G044_SCI1_CLKP>;
437 clocks = <&cpg CPG_MOD R9A07G044_CANFD_PCLK>,
472 clocks = <&cpg CPG_MOD R9A07G044_I2C0_PCLK>;
494 clocks = <&cpg CPG_MOD R9A07G044_I2C1_PCLK>;
516 clocks = <&cpg CPG_MOD R9A07G044_I2C2_PCLK>;
538 clocks = <&cpg CPG_MOD R9A07G044_I2C3_PCLK>;
549 clocks = <&cpg CPG_MOD R9A07G044_ADC_ADCLK>,
550 <&cpg CPG_MOD R9A07G044_ADC_PCLK>;
591 clocks = <&cpg CPG_MOD R9A07G044_TSU_PCLK>;
605 clocks = <&cpg CPG_MOD R9A07G044_SPI_CLK2>,
606 <&cpg CPG_MOD R9A07G044_SPI_CLK>;
642 clocks = <&cpg CPG_MOD R9A07G044_GPIO_HCLK>;
676 clocks = <&cpg CPG_MOD R9A07G044_DMAC_ACLK>,
677 <&cpg CPG_MOD R9A07G044_DMAC_PCLK>;
694 clocks = <&cpg CPG_MOD R9A07G044_GPU_CLK>,
695 <&cpg CPG_MOD R9A07G044_GPU_AXI_CLK>,
696 <&cpg CPG_MOD R9A07G044_GPU_ACE_CLK>;
722 clocks = <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK>,
723 <&cpg CPG_MOD R9A07G044_SDHI0_CLK_HS>,
724 <&cpg CPG_MOD R9A07G044_SDHI0_IMCLK2>,
725 <&cpg CPG_MOD R9A07G044_SDHI0_ACLK>;
738 clocks = <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK>,
739 <&cpg CPG_MOD R9A07G044_SDHI1_CLK_HS>,
740 <&cpg CPG_MOD R9A07G044_SDHI1_IMCLK2>,
741 <&cpg CPG_MOD R9A07G044_SDHI1_ACLK>;
757 clocks = <&cpg CPG_MOD R9A07G044_ETH0_CLK_AXI>,
758 <&cpg CPG_MOD R9A07G044_ETH0_CLK_CHI>,
777 clocks = <&cpg CPG_MOD R9A07G044_ETH1_CLK_AXI>,
778 <&cpg CPG_MOD R9A07G044_ETH1_CLK_CHI>,
792 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>;
803 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
804 <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
817 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
818 <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
831 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
832 <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
846 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
847 <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
862 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
863 <&cpg CPG_MOD R9A07G044_USB_U2H0_HCLK>;
875 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
876 <&cpg CPG_MOD R9A07G044_USB_U2H1_HCLK>;
891 clocks = <&cpg CPG_MOD R9A07G044_USB_PCLK>,
892 <&cpg CPG_MOD R9A07G044_USB_U2P_EXR_CPUCLK>;
906 clocks = <&cpg CPG_MOD R9A07G044_WDT0_PCLK>,
907 <&cpg CPG_MOD R9A07G044_WDT0_CLK>;
921 clocks = <&cpg CPG_MOD R9A07G044_WDT1_PCLK>,
922 <&cpg CPG_MOD R9A07G044_WDT1_CLK>;
936 clocks = <&cpg CPG_MOD R9A07G044_WDT2_PCLK>,
937 <&cpg CPG_MOD R9A07G044_WDT2_CLK>;
952 clocks = <&cpg CPG_MOD R9A07G044_OSTM0_PCLK>;
963 clocks = <&cpg CPG_MOD R9A07G044_OSTM1_PCLK>;
974 clocks = <&cpg CPG_MOD R9A07G044_OSTM2_PCLK>;