Lines Matching refs:cpg

8 #include <dt-bindings/clock/r8a77990-cpg-mssr.h>
93 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
105 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>;
175 clocks = <&cpg CPG_MOD 402>;
177 resets = <&cpg 402>;
191 clocks = <&cpg CPG_MOD 912>;
193 resets = <&cpg 912>;
206 clocks = <&cpg CPG_MOD 911>;
208 resets = <&cpg 911>;
221 clocks = <&cpg CPG_MOD 910>;
223 resets = <&cpg 910>;
236 clocks = <&cpg CPG_MOD 909>;
238 resets = <&cpg 909>;
251 clocks = <&cpg CPG_MOD 908>;
253 resets = <&cpg 908>;
266 clocks = <&cpg CPG_MOD 907>;
268 resets = <&cpg 907>;
281 clocks = <&cpg CPG_MOD 906>;
283 resets = <&cpg 906>;
299 clocks = <&cpg CPG_MOD 926>;
301 resets = <&cpg 926>;
313 clocks = <&cpg CPG_MOD 303>;
316 resets = <&cpg 303>;
332 clocks = <&cpg CPG_MOD 302>;
335 resets = <&cpg 302>;
351 clocks = <&cpg CPG_MOD 301>;
354 resets = <&cpg 301>;
370 clocks = <&cpg CPG_MOD 300>;
373 resets = <&cpg 300>;
377 cpg: clock-controller@e6150000 { label
378 compatible = "renesas,r8a77990-cpg-mssr";
404 clocks = <&cpg CPG_MOD 522>;
406 resets = <&cpg 522>;
421 clocks = <&cpg CPG_MOD 407>;
423 resets = <&cpg 407>;
432 clocks = <&cpg CPG_MOD 125>;
435 resets = <&cpg 125>;
445 clocks = <&cpg CPG_MOD 124>;
448 resets = <&cpg 124>;
458 clocks = <&cpg CPG_MOD 123>;
461 resets = <&cpg 123>;
471 clocks = <&cpg CPG_MOD 122>;
474 resets = <&cpg 122>;
484 clocks = <&cpg CPG_MOD 121>;
487 resets = <&cpg 121>;
498 clocks = <&cpg CPG_MOD 931>;
500 resets = <&cpg 931>;
515 clocks = <&cpg CPG_MOD 930>;
517 resets = <&cpg 930>;
532 clocks = <&cpg CPG_MOD 929>;
534 resets = <&cpg 929>;
549 clocks = <&cpg CPG_MOD 928>;
551 resets = <&cpg 928>;
565 clocks = <&cpg CPG_MOD 927>;
567 resets = <&cpg 927>;
581 clocks = <&cpg CPG_MOD 919>;
583 resets = <&cpg 919>;
597 clocks = <&cpg CPG_MOD 918>;
599 resets = <&cpg 918>;
613 clocks = <&cpg CPG_MOD 1003>;
615 resets = <&cpg 1003>;
626 clocks = <&cpg CPG_MOD 520>,
627 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
634 resets = <&cpg 520>;
644 clocks = <&cpg CPG_MOD 519>,
645 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
652 resets = <&cpg 519>;
662 clocks = <&cpg CPG_MOD 518>,
663 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
670 resets = <&cpg 518>;
680 clocks = <&cpg CPG_MOD 517>,
681 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
687 resets = <&cpg 517>;
697 clocks = <&cpg CPG_MOD 516>,
698 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
704 resets = <&cpg 516>;
713 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
721 resets = <&cpg 704>, <&cpg 703>;
732 clocks = <&cpg CPG_MOD 330>;
734 resets = <&cpg 330>;
746 clocks = <&cpg CPG_MOD 331>;
748 resets = <&cpg 331>;
757 clocks = <&cpg CPG_MOD 229>;
758 resets = <&cpg 229>;
788 clocks = <&cpg CPG_MOD 219>;
791 resets = <&cpg 219>;
830 clocks = <&cpg CPG_MOD 218>;
833 resets = <&cpg 218>;
872 clocks = <&cpg CPG_MOD 217>;
875 resets = <&cpg 217>;
1005 clocks = <&cpg CPG_MOD 812>;
1008 resets = <&cpg 812>;
1022 clocks = <&cpg CPG_MOD 916>,
1023 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1026 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1029 resets = <&cpg 916>;
1038 clocks = <&cpg CPG_MOD 915>,
1039 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1042 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1045 resets = <&cpg 915>;
1056 clocks = <&cpg CPG_MOD 914>,
1057 <&cpg CPG_CORE R8A77990_CLK_CANFD>,
1060 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>;
1063 resets = <&cpg 914>;
1078 clocks = <&cpg CPG_MOD 523>;
1080 resets = <&cpg 523>;
1088 clocks = <&cpg CPG_MOD 523>;
1090 resets = <&cpg 523>;
1098 clocks = <&cpg CPG_MOD 523>;
1100 resets = <&cpg 523>;
1108 clocks = <&cpg CPG_MOD 523>;
1110 resets = <&cpg 523>;
1118 clocks = <&cpg CPG_MOD 523>;
1120 resets = <&cpg 523>;
1128 clocks = <&cpg CPG_MOD 523>;
1130 resets = <&cpg 523>;
1138 clocks = <&cpg CPG_MOD 523>;
1140 resets = <&cpg 523>;
1150 clocks = <&cpg CPG_MOD 207>,
1151 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1158 resets = <&cpg 207>;
1167 clocks = <&cpg CPG_MOD 206>,
1168 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1175 resets = <&cpg 206>;
1184 clocks = <&cpg CPG_MOD 310>,
1185 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1192 resets = <&cpg 310>;
1201 clocks = <&cpg CPG_MOD 204>,
1202 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1208 resets = <&cpg 204>;
1217 clocks = <&cpg CPG_MOD 203>,
1218 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1224 resets = <&cpg 203>;
1233 clocks = <&cpg CPG_MOD 202>,
1234 <&cpg CPG_CORE R8A77990_CLK_S3D1C>,
1240 resets = <&cpg 202>;
1249 clocks = <&cpg CPG_MOD 211>;
1254 resets = <&cpg 211>;
1265 clocks = <&cpg CPG_MOD 210>;
1269 resets = <&cpg 210>;
1280 clocks = <&cpg CPG_MOD 209>;
1284 resets = <&cpg 209>;
1295 clocks = <&cpg CPG_MOD 208>;
1299 resets = <&cpg 208>;
1309 clocks = <&cpg CPG_MOD 807>;
1311 resets = <&cpg 807>;
1337 clocks = <&cpg CPG_MOD 806>;
1339 resets = <&cpg 806>;
1366 clocks = <&cpg CPG_MOD 515>;
1371 resets = <&cpg 515>;
1381 clocks = <&cpg CPG_MOD 514>;
1386 resets = <&cpg 514>;
1396 clocks = <&cpg CPG_MOD 513>;
1401 resets = <&cpg 513>;
1411 clocks = <&cpg CPG_MOD 512>;
1416 resets = <&cpg 512>;
1426 clocks = <&cpg CPG_MOD 511>;
1431 resets = <&cpg 511>;
1441 clocks = <&cpg CPG_MOD 510>;
1446 resets = <&cpg 510>;
1456 clocks = <&cpg CPG_MOD 509>;
1461 resets = <&cpg 509>;
1471 clocks = <&cpg CPG_MOD 508>;
1476 resets = <&cpg 508>;
1502 clocks = <&cpg CPG_MOD 1005>,
1503 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1504 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1505 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1506 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1507 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1508 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1509 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1510 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1511 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1512 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1513 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1514 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1515 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1518 <&cpg CPG_CORE R8A77990_CLK_ZA2>;
1531 resets = <&cpg 1005>,
1532 <&cpg 1006>, <&cpg 1007>,
1533 <&cpg 1008>, <&cpg 1009>,
1534 <&cpg 1010>, <&cpg 1011>,
1535 <&cpg 1012>, <&cpg 1013>,
1536 <&cpg 1014>, <&cpg 1015>;
1693 clocks = <&cpg CPG_MOD 802>;
1695 resets = <&cpg 802>;
1725 clocks = <&cpg CPG_MOD 502>;
1728 resets = <&cpg 502>;
1746 clocks = <&cpg CPG_MOD 328>;
1748 resets = <&cpg 328>;
1757 clocks = <&cpg CPG_MOD 328>;
1759 resets = <&cpg 328>;
1767 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1771 resets = <&cpg 703>, <&cpg 704>;
1779 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1784 resets = <&cpg 703>, <&cpg 704>;
1793 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
1795 resets = <&cpg 703>, <&cpg 704>;
1805 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>;
1809 resets = <&cpg 314>;
1819 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>;
1823 resets = <&cpg 313>;
1833 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>;
1837 resets = <&cpg 311>;
1850 clocks = <&cpg CPG_MOD 917>;
1852 resets = <&cpg 917>;
1869 clocks = <&cpg CPG_MOD 408>;
1872 resets = <&cpg 408>;
1895 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1898 resets = <&cpg 319>;
1906 clocks = <&cpg CPG_MOD 626>;
1908 resets = <&cpg 626>;
1915 clocks = <&cpg CPG_MOD 607>;
1917 resets = <&cpg 607>;
1925 clocks = <&cpg CPG_MOD 631>;
1927 resets = <&cpg 631>;
1934 clocks = <&cpg CPG_MOD 611>;
1936 resets = <&cpg 611>;
1944 clocks = <&cpg CPG_MOD 623>;
1946 resets = <&cpg 623>;
1953 clocks = <&cpg CPG_MOD 603>;
1955 resets = <&cpg 603>;
1963 clocks = <&cpg CPG_MOD 622>;
1965 resets = <&cpg 622>;
1972 clocks = <&cpg CPG_MOD 602>;
1974 resets = <&cpg 602>;
1983 clocks = <&cpg CPG_MOD 711>;
1984 resets = <&cpg 711>;
1992 clocks = <&cpg CPG_MOD 710>;
1993 resets = <&cpg 710>;
2000 clocks = <&cpg CPG_MOD 716>;
2002 resets = <&cpg 716>;
2036 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>;
2038 resets = <&cpg 724>;
2073 clocks = <&cpg CPG_MOD 727>;
2075 resets = <&cpg 727>;
2100 clocks = <&cpg CPG_MOD 727>;
2102 resets = <&cpg 726>;