Lines Matching refs:rv
46 #define checkuart(rp, rv, family_id, family) \ argument
50 cmp rp, rv ; \
56 .macro addruart, rp, rv, tmp
58 ldr \rv, [\rp] @ linked addr is stored there
59 sub \rv, \rv, \rp @ offset between the two
61 sub \tmp, \rp, \rv @ actual brcmstb_uart_config
65 mov \rv, #0 @ yes; record init is done
66 str \rv, [\tmp]
69 mrc p15, 0, \rv, c0, c0, 0 @ get Main ID register
71 and \rv, \rv, \rp
73 cmp \rv, \rp
77 mrc p15, 1, \rv, c15, c3, 0 @ get PERIPHBASE from CBAR
78 ands \rv, \rv, #REG_PHYS_BASE
83 ldr \rv, [\rp, #0] @ get register contents
84 ARM_BE8( rev \rv, \rv )
85 and \rv, \rv, #0xffffff00 @ strip revision bits [7:0]
88 20: checkuart(\rp, \rv, 0x33900000, 3390)
89 21: checkuart(\rp, \rv, 0x07211600, 72116)
90 22: checkuart(\rp, \rv, 0x72160000, 7216)
91 23: checkuart(\rp, \rv, 0x07216400, 72164)
92 24: checkuart(\rp, \rv, 0x07216500, 72165)
93 25: checkuart(\rp, \rv, 0x72500000, 7250)
94 26: checkuart(\rp, \rv, 0x72550000, 7255)
95 27: checkuart(\rp, \rv, 0x72600000, 7260)
96 28: checkuart(\rp, \rv, 0x72680000, 7268)
97 29: checkuart(\rp, \rv, 0x72710000, 7271)
98 30: checkuart(\rp, \rv, 0x72780000, 7278)
99 31: checkuart(\rp, \rv, 0x73640000, 7364)
100 32: checkuart(\rp, \rv, 0x73660000, 7366)
101 33: checkuart(\rp, \rv, 0x07437100, 74371)
102 34: checkuart(\rp, \rv, 0x74390000, 7439)
103 35: checkuart(\rp, \rv, 0x74450000, 7445)
115 92: and \rv, \rp, #0xffffff @ offset within 16MB section
116 add \rv, \rv, #REG_VIRT_BASE
117 str \rv, [\tmp, #8] @ Store in brcmstb_uart_virt
127 ldr \rv, [\tmp, #8] @ Load brcmstb_uart_virt