Lines Matching refs:ALT2
118 ir = <&pio4 0 ALT2 IN>;
124 ir = <&pio4 1 ALT2 IN>;
130 tx = <&pio4 2 ALT2 OUT>;
136 tx_od = <&pio4 3 ALT2 OUT>;
183 keyin2 = <&pio0 4 ALT2 IN>;
184 keyin3 = <&pio2 6 ALT2 IN>;
187 keyout1 = <&pio1 7 ALT2 OUT>;
188 keyout2 = <&pio0 6 ALT2 OUT>;
189 keyout3 = <&pio2 7 ALT2 OUT>;
287 phyclk = <&pio2 3 ALT2 IN NICLK 0 CLK_A>;
337 mtsr = <&pio3 1 ALT2 OUT>;
338 mrst = <&pio3 0 ALT2 IN>;
339 scl = <&pio3 2 ALT2 OUT>;
345 mtsr = <&pio3 1 ALT2 BIDIR_PU>;
346 scl = <&pio3 2 ALT2 OUT>;
354 mtsr = <&pio3 6 ALT2 OUT>;
355 mrst = <&pio3 4 ALT2 IN>;
356 scl = <&pio3 7 ALT2 OUT>;
362 mtsr = <&pio3 6 ALT2 BIDIR_PU>;
363 scl = <&pio3 7 ALT2 OUT>;
518 sda = <&pio10 6 ALT2 BIDIR>;
519 scl = <&pio10 5 ALT2 BIDIR>;
527 sda = <&pio11 1 ALT2 BIDIR>;
528 scl = <&pio11 0 ALT2 BIDIR>;
536 sda = <&pio15 6 ALT2 BIDIR>;
537 scl = <&pio15 5 ALT2 BIDIR>;
543 sda = <&pio12 6 ALT2 BIDIR>;
544 scl = <&pio12 5 ALT2 BIDIR>;
573 mtsr = <&pio10 6 ALT2 OUT>;
574 mrst = <&pio10 7 ALT2 IN>;
575 scl = <&pio10 5 ALT2 OUT>;
581 mtsr = <&pio10 6 ALT2 BIDIR_PU>;
582 scl = <&pio10 5 ALT2 OUT>;
605 mtsr = <&pio11 1 ALT2 OUT>;
606 mrst = <&pio11 2 ALT2 IN>;
607 scl = <&pio11 0 ALT2 OUT>;
613 mtsr = <&pio11 1 ALT2 BIDIR_PU>;
614 scl = <&pio11 0 ALT2 OUT>;
637 mtsr = <&pio12 6 ALT2 OUT>;
638 mrst = <&pio12 7 ALT2 IN>;
639 scl = <&pio12 5 ALT2 OUT>;
645 mtsr = <&pio12 6 ALT2 BIDIR_PU>;
646 scl = <&pio12 5 ALT2 OUT>;
667 mtsr = <&pio15 6 ALT2 OUT>;
668 mrst = <&pio15 7 ALT2 IN>;
669 scl = <&pio15 5 ALT2 OUT>;
675 mtsr = <&pio15 6 ALT2 BIDIR_PU>;
676 scl = <&pio15 5 ALT2 OUT>;
788 DATA6 = <&pio13 5 ALT2 IN SE_NICLK_IO 0 CLK_B>;
789 DATA5 = <&pio13 6 ALT2 IN SE_NICLK_IO 0 CLK_B>;
790 DATA4 = <&pio13 7 ALT2 IN SE_NICLK_IO 0 CLK_B>;
791 DATA3 = <&pio14 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
792 DATA2 = <&pio14 1 ALT2 IN SE_NICLK_IO 0 CLK_B>;
793 DATA1 = <&pio14 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
794 DATA0 = <&pio14 3 ALT2 IN SE_NICLK_IO 0 CLK_A>;
848 DATA7 = <&pio19 4 ALT2 IN SE_NICLK_IO 0 CLK_A>;
849 CLKIN = <&pio19 3 ALT2 IN CLKNOTDATA 0 CLK_A>;
850 VALID = <&pio19 1 ALT2 IN SE_NICLK_IO 0 CLK_A>;
851 ERROR = <&pio19 0 ALT2 IN SE_NICLK_IO 0 CLK_A>;
852 PKCLK = <&pio19 2 ALT2 IN SE_NICLK_IO 0 CLK_A>;
1216 sd_led = <&pio42 0 ALT2 OUT>;
1217 sd_pwren = <&pio42 2 ALT2 OUT>;
1218 sd_vsel = <&pio42 3 ALT2 OUT>;
1219 sd_cd = <&pio42 4 ALT2 IN>;
1220 sd_wp = <&pio42 5 ALT2 IN>;