Lines Matching refs:mcasp_clr_bits
299 static inline void mcasp_clr_bits(void __iomem *reg, u32 val) in mcasp_clr_bits() function
411 mcasp_clr_bits(dev->base + DAVINCI_MCASP_WFIFOCTL, in davinci_mcasp_stop()
416 mcasp_clr_bits(dev->base + DAVINCI_MCASP_RFIFOCTL, in davinci_mcasp_stop()
442 mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); in davinci_mcasp_set_dai_fmt()
445 mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); in davinci_mcasp_set_dai_fmt()
448 mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, in davinci_mcasp_set_dai_fmt()
455 mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE); in davinci_mcasp_set_dai_fmt()
456 mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE); in davinci_mcasp_set_dai_fmt()
458 mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE); in davinci_mcasp_set_dai_fmt()
459 mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE); in davinci_mcasp_set_dai_fmt()
461 mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, in davinci_mcasp_set_dai_fmt()
471 mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); in davinci_mcasp_set_dai_fmt()
472 mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); in davinci_mcasp_set_dai_fmt()
475 mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); in davinci_mcasp_set_dai_fmt()
482 mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); in davinci_mcasp_set_dai_fmt()
487 mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL); in davinci_mcasp_set_dai_fmt()
496 mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL); in davinci_mcasp_set_dai_fmt()
498 mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL); in davinci_mcasp_set_dai_fmt()
499 mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL); in davinci_mcasp_set_dai_fmt()
590 mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, in davinci_hw_common_param()
594 mcasp_clr_bits(dev->base + DAVINCI_MCASP_REVTCTL_REG, in davinci_hw_common_param()
606 mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, in davinci_hw_common_param()
642 mcasp_clr_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); in davinci_hw_param()
659 mcasp_clr_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, FSXDUR); in davinci_hw_param()
675 mcasp_clr_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG, FSRDUR); in davinci_hw_param()
704 mcasp_clr_bits(dev->base + DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS); in davinci_hw_dit_param()