Lines Matching refs:VIACR
33 {VIACR, CR32, 0xFF, 0x00},
34 {VIACR, CR33, 0xFF, 0x00},
35 {VIACR, CR35, 0xFF, 0x00},
36 {VIACR, CR36, 0x08, 0x00},
37 {VIACR, CR69, 0xFF, 0x00},
38 {VIACR, CR6A, 0xFF, 0x40},
39 {VIACR, CR6B, 0xFF, 0x00},
40 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
41 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
42 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
43 {VIACR, CR8B, 0xFF, 0x69}, /* LCD Power Sequence Control 0 */
44 {VIACR, CR8C, 0xFF, 0x57}, /* LCD Power Sequence Control 1 */
45 {VIACR, CR8D, 0xFF, 0x00}, /* LCD Power Sequence Control 2 */
46 {VIACR, CR8E, 0xFF, 0x7B}, /* LCD Power Sequence Control 3 */
47 {VIACR, CR8F, 0xFF, 0x03}, /* LCD Power Sequence Control 4 */
48 {VIACR, CR90, 0xFF, 0x30}, /* LCD Power Sequence Control 5 */
49 {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
50 {VIACR, CR96, 0xFF, 0x00},
51 {VIACR, CR97, 0xFF, 0x00},
52 {VIACR, CR99, 0xFF, 0x00},
53 {VIACR, CR9B, 0xFF, 0x00}
73 {VIACR, CR32, 0xFF, 0x00},
74 {VIACR, CR33, 0x7F, 0x00},
75 {VIACR, CR35, 0xFF, 0x00},
76 {VIACR, CR36, 0xFF, 0x31},
77 {VIACR, CR41, 0xFF, 0x80},
78 {VIACR, CR42, 0xFF, 0x00},
79 {VIACR, CR55, 0x80, 0x00},
80 {VIACR, CR5D, 0x80, 0x00}, /*Horizontal Retrace Start bit[11] should be 0*/
81 {VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */
82 {VIACR, CR69, 0xFF, 0x00},
83 {VIACR, CR6A, 0xFD, 0x40},
84 {VIACR, CR6B, 0xFF, 0x00},
85 {VIACR, CR77, 0xFF, 0x00}, /* LCD scaling Factor */
86 {VIACR, CR78, 0xFF, 0x00}, /* LCD scaling Factor */
87 {VIACR, CR79, 0xFF, 0x00}, /* LCD scaling Factor */
88 {VIACR, CR9F, 0x03, 0x00}, /* LCD scaling Factor */
89 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
90 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
91 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
92 {VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */
93 {VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */
94 {VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */
95 {VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */
96 {VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */
97 {VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */
98 {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
99 {VIACR, CR96, 0xFF, 0x00},
100 {VIACR, CR97, 0xFF, 0x00},
101 {VIACR, CR99, 0xFF, 0x00},
102 {VIACR, CR9B, 0xFF, 0x00},
103 {VIACR, CR9D, 0xFF, 0x80},
104 {VIACR, CR9E, 0xFF, 0x80}
122 {VIACR, CR33, 0xFF, 0x00},
123 {VIACR, CR55, 0x80, 0x00},
124 {VIACR, CR5D, 0x80, 0x00},
125 {VIACR, CR36, 0xFF, 0x01}, /* Power Mangement 3 */
126 {VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */
127 {VIACR, CR6A, 0x20, 0x20}, /* Extended FIFO On */
128 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
129 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
130 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
131 {VIACR, CR8B, 0xFF, 0x2D}, /* LCD Power Sequence Control 0 */
132 {VIACR, CR8C, 0xFF, 0x2D}, /* LCD Power Sequence Control 1 */
133 {VIACR, CR8D, 0xFF, 0xC8}, /* LCD Power Sequence Control 2 */
134 {VIACR, CR8E, 0xFF, 0x36}, /* LCD Power Sequence Control 3 */
135 {VIACR, CR8F, 0xFF, 0x00}, /* LCD Power Sequence Control 4 */
136 {VIACR, CR90, 0xFF, 0x10}, /* LCD Power Sequence Control 5 */
137 {VIACR, CR91, 0xFF, 0xA0}, /* 24/12 bit LVDS Data off */
138 {VIACR, CR96, 0xFF, 0x03}, /* DVP0 ; DVP0 Clock Skew */
139 {VIACR, CR97, 0xFF, 0x03}, /* DFP high ; DFPH Clock Skew */
140 {VIACR, CR99, 0xFF, 0x03}, /* DFP low ; DFPL Clock Skew*/
141 {VIACR, CR9B, 0xFF, 0x07} /* DVI on DVP1 ; DVP1 Clock Skew*/
155 {VIACR, CR32, 0xFF, 0x00},
156 {VIACR, CR33, 0xFF, 0x00},
157 {VIACR, CR35, 0xFF, 0x00},
158 {VIACR, CR36, 0x08, 0x00},
159 {VIACR, CR47, 0xC8, 0x00}, /* Clear VCK Plus. */
160 {VIACR, CR69, 0xFF, 0x00},
161 {VIACR, CR6A, 0xFF, 0x40},
162 {VIACR, CR6B, 0xFF, 0x00},
163 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
164 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
165 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
166 {VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */
167 {VIACR, CR8B, 0xFF, 0x5D}, /* LCD Power Sequence Control 0 */
168 {VIACR, CR8C, 0xFF, 0x2B}, /* LCD Power Sequence Control 1 */
169 {VIACR, CR8D, 0xFF, 0x6F}, /* LCD Power Sequence Control 2 */
170 {VIACR, CR8E, 0xFF, 0x2B}, /* LCD Power Sequence Control 3 */
171 {VIACR, CR8F, 0xFF, 0x01}, /* LCD Power Sequence Control 4 */
172 {VIACR, CR90, 0xFF, 0x01}, /* LCD Power Sequence Control 5 */
173 {VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
174 {VIACR, CR96, 0xFF, 0x00},
175 {VIACR, CR97, 0xFF, 0x00},
176 {VIACR, CR99, 0xFF, 0x00},
177 {VIACR, CR9B, 0xFF, 0x00}
193 {VIACR, CR32, 0xFF, 0x00},
194 {VIACR, CR33, 0x7F, 0x00},
195 {VIACR, CR35, 0xFF, 0x00},
196 {VIACR, CR36, 0x08, 0x00},
197 {VIACR, CR69, 0xFF, 0x00},
198 {VIACR, CR6A, 0xFD, 0x60},
199 {VIACR, CR6B, 0xFF, 0x00},
200 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
201 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
202 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
203 {VIACR, CRD4, 0xFF, 0x81}, /* Second power sequence control */
204 {VIACR, CR91, 0xFF, 0x80}, /* 24/12 bit LVDS Data off */
205 {VIACR, CR96, 0xFF, 0x00},
206 {VIACR, CR97, 0xFF, 0x00},
207 {VIACR, CR99, 0xFF, 0x00},
208 {VIACR, CR9B, 0xFF, 0x00},
209 {VIACR, CRD2, 0xFF, 0xFF} /* TMDS/LVDS control register. */
222 {VIACR, CR32, 0xFF, 0x00},
223 {VIACR, CR35, 0xFF, 0x00},
224 {VIACR, CR36, 0x08, 0x00},
225 {VIACR, CR6A, 0xFF, 0x80},
226 {VIACR, CR6A, 0xFF, 0xC0},
228 {VIACR, CR55, 0x80, 0x00},
229 {VIACR, CR5D, 0x80, 0x00},